Substrate for semiconductor device, manufacturing method thereof, semiconductor device, and frame main body

• US 7,129,578 B2
• Filed: 05/23/2002
• Issued: 10/31/2006
• Est. Priority Date: 05/30/2001
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Togawa, Miyoshi
• Primary Examiner(s): Whitehead, Jr., Carl
• Assistant Examiner(s): Mitchell, James M.
• Application Number:
  US10/152,855
• Publication Number:
  US 20020195695A1
• Time in Patent Office: 1,622 Days
• Field of Search: 257/666, 257/678
• US Class Current: 257/730
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 23/13 characterised by the shape
• CPC Class Codes: H01L 23/62 Protection against overvoltage, e.g. fuses, shunts
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/12041 LED
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/207 Diameter ranges

Abstract

A lead frame comprises a lead frame body having cut-away portions cut away from the side surfaces of the lead frame body, a die pad for securing a semiconductor chip, bonding electrodes surrounding the die pad, external electrodes for allowing the lead frame to be mounted, wiring for surface treatment extending on the lead frame body with its end being located at a portion of each of the side surfaces of the lead frame body, the portion being opposed to the cut-away portions. The bonding electrode and the wiring for surface treatment, as well as the external electrode and the wiring for surface treatment, are electrically connected, respectively. Even when the lead frame is electrostatically charged by friction with a transfer unit, the semiconductor chip on the lead frame avoids electrostatic damage.

Claims

1. A substrate for a semiconductor device comprising:

an insulating substrate body having a plurality of cut-away portions cut away from at least one side edge surface thereof at a distance from each other, and defining an elongated surface of each of said cut-away portions for receiving gathered ends of wiring for surface treatment, and defining between an adjacent pair of said cut-away portions a protrusion serving as a chucking portion for allowing said substrate body to be chucked;

a die pad for securing a semiconductor chip, said die pad being positioned on said insulating substrate body;

a plurality of bonding electrodes surrounding said die pad;

a plurality of external electrodes for allowing said substrate for a semiconductor device to be mounted, each external electrode being electrically connected to a corresponding one of said plurality of bonding electrodes and being positioned under said insulating substrate body;

a plurality of wiring segments being divided into a plurality of wiring segment groups for surface treatment, gathered ends of which terminate at said elongated surface of said cut-away portions, wherein each wiring segment of a wiring segment group extends on said insulating substrate body such that each wiring segment connects each external electrode to the corresponding one of said plurality of bonding electrodes through a common one of the plurality of cut-away portions; and

wiring for supplying power to said semiconductor chip and for grounding, wherein the wiring for supplying power to said semiconductor chip and for grounding is located at least at one of the side edges of said insulating substrate body except for said cut-away portion wherein the wiring for supplying power to said semiconductor chip and for grounding is located on both sides of said wiring for surface treatment, said wiring for surface treatment being located at said portion of said side surface of said insulating substrate body, and said portion being opposed to said cut-away portion, and wherein said wiring for surface treatment is positioned between one wiring for supplying power to said semiconductor chip and for grounding and the other wiring for supplying power to said semiconductor chip and for grounding, and

wherein said wiring for supplying power to said semiconductor chip and for grounding has a width wider than that for said wiring for surface treatment for enhancing resistance to electrostatic damage.

2. The substrate for a semiconductor device as claimed in claim 1, wherein said surface treatment is an electroplating process.

3. A semiconductor device comprising:

a substrate for a semiconductor device having an insulating substrate body having a plurality of cut-away portions cut away from at least one side edge surface thereof at a distance from each other, and defining an elongated surface of each of said cut-away portions for receiving gathered ends of wiring for surface treatment, and defining between an adjacent pair of said cut-away portions a protrusion serving as a chucking portion for allowing said substrate body to be chucked;

a semiconductor chip secured on said substrate for a semiconductor device;

sealing compound for sealing said semiconductor chip, wherein said substrate includes a plurality of bonding electrodes on a first side of said substrate on which said semiconductor chip is mounted, and wherein said substrate includes a plurality of external electrodes on a second side of said substrate that allows said substrate to be mounted, and wherein the bonding electrodes and the external electrodes are provided with a plurality of wiring segments that are divided into a plurality of wiring segment groups for surface treatment, gathered ends of which are located at said elongated surface of said cut-away portions, wherein each wiring segment of said plurality of wiring segment groups extends on said insulating substrate body thereby connecting one of the plurality of said bonding electrodes to a corresponding one of the plurality of external electrodes via a common one of a plurality of cut-away portions located on the side edges of said insulating substrate body; and

wiring for supplying power to said semiconductor chip and for grounding, wherein the wiring for supplying power to said semiconductor chip and for grounding is located at at least one of the side edges of said insulating substrate body except for said cut-away portion at both sides of said wiring for surface treatment.

4. The semiconductor device as set forth in claim 3 wherein said wiring for supplying power to said semiconductor chip and for grounding has a width wider than that for said wiring for surface treatment for enhancing resistance to electrostatic damage.

5. A substrate for a semiconductor device comprising:

an insulating substrate body having a plurality of cut-away portions cut away from at least one side edge surface thereof at a distance from each other, and defining an elongated surface of each of said cut-away portions receiving gathered ends of wiring for surface treatment, and defining between an adjacent pair of said cut-away portions a protrusion serving as a chucking portion for allowing said substrate body to be chucked;

a die pad for securing a semiconductor chip, said die pad being positioned on said insulating substrate body;

a plurality of bonding electrodes surrounding said die pad;

a plurality of external electrodes for allowing said substrate for a semiconductor device to be mounted, each external electrode being electrically connected to a corresponding one of said plurality of bonding electrodes and being positioned under said insulating substrate body;

a plurality of wiring segments being divided into a plurality of wiring segment groups for surface treatment, gathered ends of which communicate with said elongated surface of said cut-away portion, wherein each wiring segment of a wiring segment group extends on said insulating substrate body such that each wiring segment connects each external electrode to the corresponding one of said plurality of bonding electrodes through a common one of the plurality of cut-away portions; and

wiring for supplying power to said semiconductor chip and for grounding, wherein the wiring for supplying power to said semiconductor chip and for grounding extends to at least one of a plurality of protruding portions of said insulating substrate body.

6. The substrate for a semiconductor device as set forth in claim 5 wherein said wiring for supplying power to said semiconductor chip and for grounding has a width wider than that for said wiring for surface treatment for enhancing resistance to electrostatic damage.