Variable-order delta sigma modulator and DA converter

• US 7,129,873 B2
• Filed: 11/23/2004
• Issued: 10/31/2006
• Est. Priority Date: 08/12/2002
• Status: Expired due to Fees

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: Kawamura, Akinobu
• Primary Examiner(s): Jeanglaude, Jean Bruner
• Application Number:
  US10/994,306
• Publication Number:
  US 20050088328A1
• Time in Patent Office: 707 Days
• Field of Search: 341/143, 341/155
• US Class Current: 341/143
• CPC Class Codes: H03M 7/3015 Structural details of digital delta-sigma modulators
• CPC Class Codes: H03M 7/3022 having multiple quantisers arranged in cascaded loops, each of the second and further loops processing the quantisation error of the loop preceding it, i.e. multiple stage noise shaping [MASH] type
• CPC Class Codes: H03M 7/3028 the quantiser being a single bit one
• CPC Class Codes: H03M 7/3037 with weighted feedforward summation, i.e. with feedforward paths from more than one filter stage to the quantiser input
• CPC Class Codes: H03M 7/304 with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage

Abstract

The variable-order delta sigma modulator of the invention is capable of setting an optimum order in relation to a sampling frequency to be used, when using one out of plural sampling frequencies. As to the delta sigma modulator of the third order or higher, in a combination of two arbitrary continued integrators constituting the modulator is furnished a means that connects or disconnects the circuit on the second integrator side at the part of connecting the first integrator and the second integrator, or a means of switching the relation of connections. Connecting or disconnecting the circuit through the means and switching the relation of connections will set the order of the delta sigma modulator into an optimum order in relation to a sampling frequency.

Claims

1. A variable-order delta sigma modulator comprising:

a plurality of integrators arranged in sequence to have a construction that supplies an output signal from one said plurality of integrators to at least one integrator of a next-stage;

means of disconnecting or connecting circuits, provided in connection parts to supply the output signal to the next stage integrators;

a quantization error circuit coupled to the outputs of said plurality of integrators and adapted to generate a quantization error;

a circuitry to feed back said quantization error to the input of said one plurality of integrators;

means of controlling the disconnecting or connecting means on the basis of a detected or set sampling frequency, whereby an order of the modulator is made variable in relation to the detected or set sampling; and

a control means that switches the order of the modulator into an order optimum to a new sampling frequency, accompanied with the switching of the sampling frequency, on the basis of a table showing connections or disconnections of the integrators by the means that vary the order of the delta sigma modulator and the combination of plural integrators, and a table showing relations between the sampling frequencies and the optimum orders.

2. A DA converter comprising a delta sigma modulator as claimed in claim 1.

3. A variable-order delta sigma modulator comprising:

a plurality of integrators arranged to supply an output signal to respective multipliers;

a plurality of selectors that select a signal from at least one of the respective multipliers or a zero output terminal; and

means for setting an order of the delta sigma modulator into an optimum order on the basis of a sampling frequency.

4. A DA converter comprising a delta sigma modulator as claimed in claim 3.

5. The variable-order delta sigma modulator according to claim 3, further comprising:

a plurality of subtractors that receive the selected signal, and supply subtracted signals to the plurality of integrators.