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Simulation-based functional verification of microcircuit designs

  • US 7,130,783 B1
  • Filed: 01/12/2001
  • Issued: 10/31/2006
  • Est. Priority Date: 01/12/2001
  • Status: Active Grant
First Claim
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1. A method of verifying a design for a microcircuit, the method comprising:

  • beginning random simulation of a sequence of states of a microcircuit design by inputting a sequence of random input vectors to a random simulation model to obtain a sequence of random simulation states;

    monitoring a simulation coverage progress metric to determine on a basis of said sequence of random simulation states a preference for beginning formal simulation of a sequence of states of said microcircuit design;

    beginning formal simulation of a sequence of states of said microcircuit design by using formal simulation methods to simulate a sequence of formal simulation states in a formal simulation model of said microcircuit design;

    monitoring a formal coverage progress metric to determine on a basis of said sequence of formal simulation states a preference for resuming random simulation of states of said microcircuit design;

    resuming generation of random input vector sequences for said random simulation model of a microcircuit design and said simulating of a sequence of random simulation states of said microcircuit design caused by inputting said random input vector sequence to said random simulation model;

    testing for whether a goal state has been reached; and

    recording an indication that a goal state has been reached, that can be used by a user, if a goal state has been found.

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