Chiprate correction in digital transceivers
First Claim
Patent Images
1. A wireless transceiver comprising:
- a receiver to receive coded information signals;
a transmitter to transmit coded information signals;
a local oscillator providing a time and frequency reference for said receiver and said transmitter;
a timing controller providing timing signals for said receiver and said transmitter;
a signal processor to decode said coded information signals received by said receiver and to determine a timing error associated with said timing controller based on said received coded information signals; and
an automatic frequency control circuit outputting a control signal to said local oscillator responsive to a frequency error to adjust the frequency reference output by said local oscillator, said automatic frequency control circuit including an integrator to integrate said frequency error to generate said control signal;
a timing correction circuit to smoothly adjust timing of said coded information transmitted by said transmitter responsive to said timing error to reduce said timing error over a desired time interval, said timing control circuit comprising;
a timing correction loop to generate a frequency offset value based on said timing error that modifies the frequency error so as to bias the frequency reference output by said local oscillator in a manner to reduce the timing error,a scaling and filtering unit to smooth the timing error over a predetermined period of time;
an integrator to integrate said timing error to generate said frequency offset value to produce an increasing frequency bias as long as the sign of the timing error remains the same.
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Abstract
A transceiver for a code division multiple access communication system comprises a receiver to receive coded information signals and a transmitter to transmit coded information signals. A local oscillator provides a time and frequency reference for the receiver and the transmitter. A timing controller provides timing signals for the receiver and the transmitter. A signal processor decodes received signals to determine a common error associated with the timing controller. A timing correction circuit smoothly adjusts the timing of the coded information signals transmitted by the transmitter responsive to the timing error to reduce the timing error over a desired time interval.
35 Citations
16 Claims
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1. A wireless transceiver comprising:
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a receiver to receive coded information signals; a transmitter to transmit coded information signals; a local oscillator providing a time and frequency reference for said receiver and said transmitter; a timing controller providing timing signals for said receiver and said transmitter; a signal processor to decode said coded information signals received by said receiver and to determine a timing error associated with said timing controller based on said received coded information signals; and an automatic frequency control circuit outputting a control signal to said local oscillator responsive to a frequency error to adjust the frequency reference output by said local oscillator, said automatic frequency control circuit including an integrator to integrate said frequency error to generate said control signal; a timing correction circuit to smoothly adjust timing of said coded information transmitted by said transmitter responsive to said timing error to reduce said timing error over a desired time interval, said timing control circuit comprising; a timing correction loop to generate a frequency offset value based on said timing error that modifies the frequency error so as to bias the frequency reference output by said local oscillator in a manner to reduce the timing error, a scaling and filtering unit to smooth the timing error over a predetermined period of time; an integrator to integrate said timing error to generate said frequency offset value to produce an increasing frequency bias as long as the sign of the timing error remains the same. - View Dependent Claims (2, 3)
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4. A wireless transceiver comprising:
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a receiver to receive coded information signals; a transmitter to transmit coded information signals; a local oscillator providing a time and frequency reference for said receiver and said transmitter; a timing controller providing timing signals for said receiver and said transmitter; a signal processor to decode said coded information signals received by said receiver and to determine a timing error associated with said timing controller based on said received coded information signals; a timing correction circuit to smoothly adjust timing of said coded information transmitted by said transmitter responsive to said timing error to reduce said timing error over a desired time interval, said timing correction circuit comprising; a continuous phase rotator responsive to phase control signals to modify said frequency reference output by said local oscillator to generate a modified frequency reference; a transmit timing signal generator including a transmit counter to generate timing signals for said transmitter from said modified frequency reference; a receive timing signal generator including a receive counter to generate timing signals for said receiver from said unmodified frequency reference; a comparator to compare current values of the receive and transmit counters to provide a difference value; a control processor for tracking an accumulated advance or delay of the transmit timing signals relative to the receive timing signals and for generating said phase control signals. - View Dependent Claims (5)
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6. A method of correcting transmit timing in a wireless transceiver having a transmitter, a receiver, a local oscillator providing a time and frequency reference for said receiver and said transmitter, and a timing controller providing timing signals for said transmitter and said receiver to control transmit and receive timing respectively, said method comprising:
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decoding a received information signal in a decoder; determining a timing error associated with said timing controller by comparing a local time reference to a time reference derived from said received information signal; smoothly adjusting the transmit timing of said transceiver over a desired time period responsive to said timing error to correct said timing error by modifying said frequency reference and using said modified frequency reference to generate said transmit timing signals for said transmitter; using said frequency reference output by local oscillator unmodified to generate said receive timing signals for said receiver; determining an accumulated advance or delay of the transmit timing signal relative to the receive timing signals by comparing the value of a receive counter used to derive said receive timing signals to the value of a transmit counter used to derive said transmit timing signals. - View Dependent Claims (7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A method of correcting transmit timing in a wireless transceiver having a transmitter, a receiver, a local oscillator providing a time and frequency reference for said receiver and said transmitter, and a timing controller providing timing signals for said transmitter and said receiver to control transmit and receive timing respectively, said method comprising:
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decoding a received signal to determine a timing error and frequency error; scaling and filtering the timing error over a predetermined period of time to smooth the timing error; integrating said timing error to generate a frequency offset value to produce an increasing frequency bias as long as the sign of the timing error remains the same; modifying said frequency error by adding said frequency offset value to said frequency error; integrating said modified frequency error to generate a control signal to control said local oscillator so as to bias the frequency reference output by said local oscillator in a manner that smoothly adjusts said transmit timing over a desired time period.
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Specification