Method and apparatus for measuring communications link quality
First Claim
1. A communications link receiver, comprising:
- a data receiver for receiving a communications signal from a communications link;
a first circuit for producing a high frequency jitter measurement output proportional to an amount of high frequency jitter of said communications signal, said high frequency jitter measurement output having a component that varies with an amount of low frequency jitter present in said communications signal;
a second circuit for producing a low frequency jitter measurement output proportional to an amount of low frequency jitter of said communications signal; and
a correction circuit coupled to said high frequency jitter measurement output and said low frequency jitter measurement output for correcting said high frequency jitter measurement output in conformity with said low frequency jitter measurement output to produce a corrected high frequency jitter measurement output, wherein said data receiver comprises a clock/data recovery circuit, and wherein an input of said first circuit and an input of said second circuit are coupled internal signals of said clock and data recovery circuit for providing a measure of jitter of said communications signal.
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Accused Products
Abstract
A method and apparatus for measuring communications link quality provides accurate on-chip estimation of the difficulty of achieving a particular bit error rate (BER) for a communications link. A low cost/complexity accumulator circuit connected to internal signals from a clock/data recovery (CDR) circuit provides a measure of high frequency and low frequency jitter in a received signal. The low frequency jitter measurement is used to correct the high frequency jitter measurement which may otherwise contain error. The corrected output may be used to adjust operational characteristics of the link or otherwise evaluate the link for operating margin. The correction may be performed by subtracting a portion of the low frequency jitter measurement from the measured high frequency jitter, or the value of the low frequency jitter measurement may be used to select between two or more correction factors that are then applied to the high frequency jitter measurement.
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Citations
13 Claims
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1. A communications link receiver, comprising:
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a data receiver for receiving a communications signal from a communications link; a first circuit for producing a high frequency jitter measurement output proportional to an amount of high frequency jitter of said communications signal, said high frequency jitter measurement output having a component that varies with an amount of low frequency jitter present in said communications signal; a second circuit for producing a low frequency jitter measurement output proportional to an amount of low frequency jitter of said communications signal; and a correction circuit coupled to said high frequency jitter measurement output and said low frequency jitter measurement output for correcting said high frequency jitter measurement output in conformity with said low frequency jitter measurement output to produce a corrected high frequency jitter measurement output, wherein said data receiver comprises a clock/data recovery circuit, and wherein an input of said first circuit and an input of said second circuit are coupled internal signals of said clock and data recovery circuit for providing a measure of jitter of said communications signal. - View Dependent Claims (2, 3, 4, 5, 9, 10)
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6. A communications link receiver, comprising:
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a data receiver for receiving a communications signal from a communications link; a first circuit for producing a high frequency jitter measurement output proportional to an amount of high frequency jitter of said communications signal, said high frequency jitter measurement output having a component that varies with an amount of low frequency jitter present in said communications signal; a second circuit for producing a low frequency jitter measurement output proportional to an amount of low frequency jitter of said communications signal; and a correction circuit coupled to said high frequency jitter measurement output and said low frequency jitter measurement output for correcting said high frequency jitter measurement output in conformity with said low frequency jitter measurement output to produce a corrected high frequency jitter measurement output, wherein said correction circuit subtracts a predetermined portion of said low frequency jitter measurement output from said high frequency jitter measurement output to produce said corrected high frequency jitter measurement output.
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7. A communications link receiver, comprising:
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a data receiver for receiving a communications signal from a communications link; a first circuit for producing a high frequency jitter measurement output proportional to an amount of high frequency jitter of said communications signal, said high frequency jitter measurement output having a component that varies with an amount of low frequency jitter present in said communications signal; a second circuit for producing a low frequency jitter measurement output proportional to an amount of low frequency jitter of said communications signal; and a correction circuit coupled to said high frequency jitter measurement output and said low frequency jitter measurement output for correcting said high frequency jitter measurement output in conformity with said low frequency jitter measurement output to produce a corrected high frequency jitter measurement output, wherein said correction circuit subtracts a given one of a plurality of predetermined values from said high frequency jitter measurement output to produce said corrected high frequency jitter measurement output, wherein said given values are selected in conformity with a value of said low frequency jitter measurement output. - View Dependent Claims (8)
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11. A communications link receiver, comprising:
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a data receiver including a clock/data recovery circuit for receiving a communications signal from a communications link; a first circuit connected to one or more signals from said clock/data recovery circuit providing indications of edge positions of said communications signal with respect to a reference clock of said clock/data recovery circuit and producing a high frequency jitter measurement output by accumulating said indications of edge positions of said communications signal, said high frequency jitter measurement output having a component that varies with an amount of low frequency jitter present in said communications signal; a second circuit connected to one or more signals from said clock/data recovery circuit providing indications of long-term phase variation of said communications signal with respect to a reference clock of said clock/data recovery circuit and producing a low frequency jitter measurement output by accumulating said indications of long-term phase variation; and a correction circuit connected to said high frequency jitter measurement output and said low frequency jitter measurement output for correcting said high frequency jitter measurement output in conformity with said low frequency jitter measurement output to produce a corrected high frequency jitter measurement output. - View Dependent Claims (12, 13)
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Specification