Method and apparatus for debugging programs in a distributed environment

• US 7,133,820 B2
• Filed: 03/14/2001
• Issued: 11/07/2006
• Est. Priority Date: 03/15/2000
• Status: Active Grant

• Current Assignee: Synopsys Incorporated
• Original Assignee: Arc International (Synopsys Incorporated)
• Inventors: Davis, Henry A., Pennello, Thomas J.
• Primary Examiner(s): FERRIS III, FRED O
• Application Number:
  US09/808,612
• Publication Number:
  US 20010056341A1
• Time in Patent Office: 2,064 Days
• Field of Search: 703/20, 703/13, 703/23, 703/22, 716/16, 717/124, 717/4, 717102-135
• US Class Current: 703/22
• CPC Class Codes: G06F 11/3636 by tracing the execution of the program

Abstract

A method and apparatus for debugging programs in a distributed environment, such as a set of heterogeneous hardware processors (integrated circuits or In-Circuit Emulators), and/or software-based simulators. In one embodiment, the method comprises identifying a plurality of processes; initializing each of the processes; executing with a single thread of control among the processes; and continuously cycling among the processes to obtain status information. A computer program and apparatus for implementing the aforementioned methodology are also disclosed.

Claims

1. A method of debugging a plurality of processes on a plurality of heterogeneous processors using a debugger program, comprising:

initializing a poll delay associated with each process;

determining the state of said debugger program;

if said state comprises a first value, determining the run status of at least one of said processes;

if said at least process is running, determining a process type associated with said at least one process;

if said process type comprises a simulation type, advancing through at least one instruction cycle and checking the status of said simulated process; and

if said process type comprises a hardware type, delaying said debugger program for a predetermined time until a subsequent polling opportunity is available, and determining the status of said hardware process at or after said subsequent polling opportunity;

wherein said plurality of processes are adapted to gather status information regarding respective ones of said heterogeneous processors as controlled by said debug process, said gathering of status information occurring on a dynamic per-process time interval.

2. The method of claim 1, further comprising:

utilizing said debugger program to check a value of simulator variable to determine whether any currently running ones of said processes are executing in a simulator; and

if so, returning said debugger program immediately to said act of determining the state so that said processes executing in a simulator will run as quickly as possible.

3. The method of claim 1, further comprising analyzing said status information to identify at least one or more occurrences of errors.

4. The method of claim 1, further comprising:

defining at least one object class;

defining at least one first object subclass for said hardware type process; and

defining at least one second object subclass for said simulation type process.

5. The method of claim 1, further comprising dynamically changing polling times associated with at least one of said plurality of processes based on the status thereof.

6. The method of claim 1, further comprising defining an interface to a first library for said hardware type process.

7. The method of claim 6, further comprising accessing said first library via said interface in order to provide functions relating to at least one extension instruction.

8. The method of claim 1, further comprising defining an interface to a first library for said simulation type process.

9. The method of claim 8, further comprising accessing said first library via said interface in order to provide functions relating to at least one extension instruction, including the implementation of said at least one extension instruction.

10. The method of claim 1, further comprising:

defining a plurality of individual subclasses for each of said plurality of processes; and

implementing at least a portion of said subclasses as a dynamically loadable library.

11. The method of claim 1, wherein said gathering of status information comprises switching without determining whether or not a debug event has occurred.

12. The method of claim 1, wherein said act of gathering status information comprises obtaining said status information without determining whether a debug event has occurred.

13. An apparatus for debugging a plurality of processes on a plurality of heterogeneous processors, said apparatus debugging according to the method comprising:

initializing a poll delay associated with each process;

determining the state of said debugger program;

if said state comprises a first value, determining the run status of at least one of said processes;

if said at least process is running, determining a process type associated with said at least one process;

if said process type comprises a simulation type, advancing through at least one instruction cycle and checking the status of said simulated process; and

if said process type comprises a hardware type, delaying said debugger program for a predetermined time until a subsequent polling opportunity is available, and determining the status of said hardware process at or after said subsequent polling opportunity;

wherein said plurality of processes are adapted to gather status information regarding respective ones of said heterogeneous processors as controlled by said debug process, said gathering of status information occurring on a dynamic per-process time interval.

14. The apparatus of claim 13, wherein said plurality of heterogeneous processors comprises a digital processor embodied as an integrated circuit, and said debugging method comprises is performed by a computer program adapted to run on said integrated circuit.

15. The apparatus of claim 13, further comprising at least one external port adapted for data communication with respective ones of said hardware type processes.

16. A method of debugging a plurality of processes on a plurality of heterogeneous processors using a debugger program, comprising:

initializing a poll delay associated with each process;

determining the state of said debugger program;

determining the run status of at least one of said processes; and

determining a process type associated with said at least one process, wherein if said process type comprises a simulation type, advancing through at least one instruction cycle and checking the status of said simulated process; and

wherein if said process type comprises a hardware type, delaying said debugger program for a predetermined time until a subsequent polling opportunity is available, and determining the status of said hardware process at or after said subsequent polling opportunity; and

wherein said plurality of processes are adapted to gather status information regarding respective ones of said heterogeneous processors as controlled by said debug process, said gathering of status information occurring on a dynamic per-process time interval.

17. The method of claim 16, further comprising:

utilizing said debugger program to check a value of simulator variable to determine whether any currently running ones of said processes are executing in a simulator; and

if so, returning said debugger program immediately to said act of determining the state.

18. The method of claim 16, further comprising analyzing said status information to identify at least one or more occurrences of errors.

19. The method of claim 16, further comprising:

defining at least one object class, defining at least one first object subclass for said hardware type process; and

defining at least one second object subclass for said simulation type process.

20. The method of claim 16, further comprising dynamically changing polling times associated with at least one of said plurality of processes based on the status thereof.

21. The method of claim 16, further comprising defining an interface to a first library for said hardware type process.

22. The method of claim 21, further comprising accessing said first library via said interface in order to provide functions relating to at least one extension instruction.

23. The method of claim 16, further comprising defining an interface to a first library for said simulation type process.

24. The method of claim 23, further comprising accessing said first library via said interface in order to provide functions relating to at least one extension instruction, including the implementation of said at least one extension instruction.

25. The method of claim 16, further comprising:

defining a plurality of individual subclasses for each of said plurality of processes; and

implementing at least a portion of said subclasses as a dynamically loadable library.

26. The method of claim 16, wherein said gathering of status information comprises switching without determining whether or not a debug event has occurred.

27. The method of claim 16, wherein said act of gathering status information comprises obtaining said status information without determining whether a debug event has occurred.

28. A method of debugging a plurality of processes on a plurality of heterogeneous processors using a debugger program, comprising:

a step for initializing a minimum time period between retrievals of said heterogeneous processor status information for display to a user with each process;

a step for determining the state of said debugger program;

a step for determining the run status of at least one of said processes if said state comprises a first value;

a step for determining a process type associated with said at least one process if said at least process is running;

a step for advancing through at least one instruction cycle and checking the status of said simulated process if said process type comprises a simulation type; and

a step for delaying said debugger program for a predetermined time until a subsequent polling opportunity is available if said process type comprises a hardware type; and

a step for determining the status of said hardware process at or after said subsequent polling opportunity;

wherein said plurality of processes are adapted to gather status information regarding respective ones of said heterogeneous processors as controlled by said debug process, said gathering of status information occurring on a dynamic per-process time interval.