×

Design-based monitoring

  • US 7,135,344 B2
  • Filed: 02/17/2004
  • Issued: 11/14/2006
  • Est. Priority Date: 07/11/2003
  • Status: Active Grant
First Claim
Patent Images

1. A method for monitoring fabrication of an integrated circuit (IC) on a semiconductor wafer, comprising:

  • generating a product design profile (PDP) using an electronic design automation (EDA) tool, the PDP comprising an indication of a site in at least one layer of the IC that is susceptible to a process fault;

    fabricating the at least one layer of the IC on the wafer; and

    applying a process monitoring tool to perform a measurement at the site in the at least one layer responsively to the PDP.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×