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Bias voltage circuit with ultra low output impedance

  • US 7,135,929 B1
  • Filed: 04/21/2004
  • Issued: 11/14/2006
  • Est. Priority Date: 04/22/2003
  • Status: Active Grant
First Claim
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1. A bias circuit that outputs a bias signal that varies linearly with an input signal, the bias circuit comprising:

  • an input stage that receives the input signal and produces the bias signal at an output terminal that is coupled to a gain stage, wherein the gain stage comprises a common-emitter gain stage that has a base terminal;

    a load coupled to the input stage at a first terminal; and

    a feedback circuit coupled between the first terminal, the base terminal, and the gain stage, wherein the feedback circuit comprises;

    first and second diodes; and

    a capacitor coupled to the first and second diodes.

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