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Systems and methods for mismatch cancellation in switched capacitor circuits

  • US 7,136,006 B2
  • Filed: 06/23/2005
  • Issued: 11/14/2006
  • Est. Priority Date: 12/16/2004
  • Status: Active Grant
First Claim
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1. A double-sampling sigma-delta modulator circuit, the circuit comprising:

  • an amplifier including an integrating capacitor;

    a switched capacitor conversion element including a single capacitor bank, wherein the single capacitor bank includes a first capacitive element and a second capacitive element; and

    a control element, wherein the control element provides phase signaling that identifies at least a first phase and a second phase;

    wherein during the first phase charge present on the single capacitor bank is transferred to the integrating capacitor, and the single capacitor bank is charged; and

    wherein during the second phase charge present on the single capacitor bank is transferred to the integrating capacitor, and the single capacitor bank is discharged by electrically coupling a first plate of the first capacitive element to a first plate of the second capacitive element and electrically coupling a second plate of the first capacitive element and a second plate of the second capacitive element to the integrating capacitor.

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