Liquid crystal display and a method for driving the same

• US 7,136,040 B1
• Filed: 02/24/2000
• Issued: 11/14/2006
• Est. Priority Date: 02/24/1999
• Status: Expired due to Term

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Park, Haeng-Won, Park, Woon-Yong
• Primary Examiner(s): Lefkowitz, Sumati
• Assistant Examiner(s): Kumar, Srilakshmi K
• Application Number:
  US09/512,267
• Time in Patent Office: 2,455 Days
• Field of Search: 345 96-103, 345/213, 345/215, 345/243, 340/784
• US Class Current: 345/100
• CPC Class Codes: G02F 1/133391 Constructional arrangement for sub-divided displays
• CPC Class Codes: G02F 1/1345 Conductors connecting electrodes to cell terminals
• CPC Class Codes: G09G 2310/0205 Simultaneous scanning of several lines in flat panels
• CPC Class Codes: G09G 2320/0219 Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3666 with the matrix divided into sections

Abstract

Disclosed is a liquid crystal display (LCD). An LCD panel is divided into upper and lower panels, and a scanning direction of gate lines of the upper panel is opposite to that of gate lines of the lower panel. The upper panel includes an upper gate line block having a first gate line formed in the horizontal direction and transmits scanning signals, and upper data lines that cross the first gate line and transmit image signals. And the lower panel includes a lower gate line block having a second gate line, and lower data lines that cross the second gate line and are separated from the upper data lines. Upper and lower gate drivers that provide scanning signals to the gate lines of the upper and lower gate line blocks are located on the sides of the upper and lower panels, respectively. The upper and lower gate drivers supply the scanning signals to the gate lines in sequentially opposite directions. According to the present invention, the non-uniform brightness phenomenon can be prevented by making the scanning direction of the gate lines of the upper panel opposite to that of the gate lines of the lower panel.

Claims

1. A method for driving a liquid crystal display (LCD) having a first gate line block and a second gate line block, the method comprising the steps of:

providing a first pixel voltage to a first pixel electrode formed in the first gate line block;

providing a second pixel voltage to a second pixel electrode formed in the second gate line block, the first pixel electrode and the second pixel electrode being arranged on the same column;

providing a common voltage to a common electrode;

providing a first data signal to a first data line formed in the first gate line block, said first data signal influencing a first voltage difference between the common voltage and the first pixel voltage stored in the first pixel electrode;

providing a second data signal to a second data line formed in the second gate line block, said second data signal influencing a second voltage difference between the common voltage and the second pixel voltage stored in the second pixel electrode; and

controlling the first data signal and the second data signal based on polarities of the first pixel voltage stored in the first pixel electrode and the second pixel voltage stored in the second pixel electrode to simultaneously increase or decrease the first voltage difference and the second voltage difference.

2. The method of claim 1, wherein the first pixel voltage has a first polarity with respect to the common voltage and the second pixel voltage has a second polarity with respect to the common electrode different from the first polarity.

3. The method of claim 2, wherein the step of controlling the first data signal and the second data signal comprises the step of providing the first data signal of the first polarity and the second data signal of the second polarity to simultaneously increase the first voltage difference and the second voltage difference.

4. The method of claim 2, wherein the step of controlling the first data signal and the second data signal comprises the step of providing the first data signal of the second polarity and the second data signal of the first polarity to simultaneously decrease the first voltage difference and the second voltage difference.

5. The method of claim 1, wherein the first pixel voltage has a first polarity with respect to the common voltage and the second pixel voltage has the first polarity with respect to the common voltage.

6. The method of claim 5, wherein the step of controlling the first data signal and the second data signal comprises the step of providing the first data signal of the first polarity and the second data signal of the first polarity to simultaneously increase the first voltage difference and the second voltage difference.

7. The method of claim 5, wherein the step of controlling the first data signal and the second data signal comprises the step of providing the first data signal of a second polarity and the second data signal of the second polarity to decrease the first voltage difference and the voltage second difference.

8. The method of claim 1, wherein the first pixel electrode and the second electrode are adjoining each other.

9. The method of claim 1, wherein the LCD has more than two gate line blocks.

10. A liquid crystal display (LCD), comprising:

a first gate line block including a first pixel electrode storing a first pixel voltage;

a second gate line block including a second pixel electrode and storing a second pixel voltage, the first pixel electrode and the second pixel electrode being arranged on the same column;

a common electrode transmitting a common voltage;

a first data line formed in the first gate line block and transmitting a first data signal, said first data signal influencing a first voltage difference between the common voltage and the first pixel voltage stored in the first pixel electrode;

a second data line formed in the second gate line block and transmitting a second data signal, said second data signal influencing a second voltage difference between the common voltage and the second pixel voltage; and

a data driver controlling the first data signal and the second data signal based on polarities of the first pixel voltage stored in the first pixel electrode and the second pixel voltage stored in the second pixel electrode to simultaneously increase or decrease the first voltage difference and the second voltage difference.

11. The LCD of claim 10, wherein the first pixel voltage has a first polarity with respect to the common voltage and the second pixel voltage has a second voltage with respect to the common voltage different from the first polarity.

12. The LCD of claim 11, wherein the data driver provides the first data signal of the first polarity and the second data signal of the second polarity to simultaneously increase the first voltage difference and the second voltage difference.

13. The LCD of claim 11, wherein the data driver provides the first data signal of the second polarity and the second data signal of the first polarity to simultaneously decrease the first voltage difference and the second voltage difference.

14. The LCD of claim 10, wherein the first pixel voltage has a first polarity with respect to the common voltage and the second pixel voltage has the first polarity with respect to the common voltage.

15. The LCD of claim 14, wherein the data driver provides the first data signal of the first polarity and the second data voltage of the first polarity to simultaneously increase the first voltage difference and the second voltage difference.

16. The LCD of claim 14, wherein the data driver provides the first data signal of the second polarity and the second data voltage of the second polarity to simultaneously decrease the first voltage difference and the second voltage difference.

17. The LCD of claim 10, wherein the first pixel electrode and the second pixel electrode are adjoining each other.

18. The LCD of claim 10, wherein the data driver comprising:

a first data driver connected to the first data line for transferring the first data line thereto; and

a second data driver connected to the second data line for transferring the second data line thereto.

19. The LCD of claim 10, wherein the LCD has more than two gate line blocks.

20. A liquid crystal display (LCD), comprising:

a first gate line block comprising;

a plurality of first gate lines;

a first pixel electrode storing a first pixel voltage; and

a first data line transmitting a first data signal, the first data signal influencing a first voltage difference between the common voltage and the first pixel voltage stored in the first pixel electrode;

a second gate line block comprising;

a plurality of second gate lines;

a second pixel electrode storing a second pixel voltage; and

a second data line separated from the first data line and transmitting a second data signal, the second data signal influencing a second voltage difference between the common voltage and the second pixel voltage stored in the second pixel electrode;

a data driver controlling the first data signal and the second data signal to simultaneously increase or decrease the first voltage difference and the second voltage difference; and

a gate driver connected to the plurality of first gate lines and the plurality of second gate lines and scanning the plurality of first gate lines in a first direction and the plurality of second gate lines in a second direction different from the first direction.