Reduced architecture processing paths
First Claim
1. A method of designing an integrated circuit comprising:
- a. generating a plurality of sequences of basic Boolean elements respectively defined by a plurality of truth tables;
b. generating a respective plurality of substituted circuits not definable by a sequence of basic Boolean elements, including a first substitute circuit, wherein the sequence of basic Boolean elements and the respective substitute circuit are defined by a same truth table;
c. storing the plurality of sequences of basic Boolean elements in a library;
d. storing the plurality of substitute circuits in the library in a relationship corresponding to their respective sequence of basic Boolean elements;
e. programming a processing path within the integrated circuit according to the first substitute circuit comprising substitute inputs and a substitute output, wherein the truth table representing the first substitute circuit is identical to the truth table representing a first sequence of basic Boolean elements representing the processing path, and wherein the first substitute circuit is not definable by a sequence of basic Boolean elements;
f. reducing the first sequence of basic Boolean elements into at least one intermediate equivalent circuit; and
g. generating the first substituted circuit.
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Abstract
A basic Boolean circuit is a transistor circuit commonly used in industry to produce the logic of a particular Boolean gate. A sequence of standard Boolean circuits disposed along the processing path of an integrated circuit define a predetermined truth table representing the relationship of inputs and outputs of the processing path. A reduced-transistor circuit is generated that is defined by the same truth table as the sequence of standard Boolean logic circuits, but is not definable by a sequence of standard Boolean logic circuits. A processing path of an integrated circuit is programmed with the reduced-transistor circuit instead of the sequence of standard Boolean circuits, thereby reducing the time delay of the processing path and the power consumed by the circuit. The reduced-transistor circuit may be generated in response to receiving a programming instruction defining a sequence of Boolean gates. Alternatively, the reduced-transistor circuit may be selected from a pre-established library storing a plurality of Boolean sequences correlated to a respective plurality of complimentary reduced-transistor circuits.
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Citations
17 Claims
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1. A method of designing an integrated circuit comprising:
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a. generating a plurality of sequences of basic Boolean elements respectively defined by a plurality of truth tables; b. generating a respective plurality of substituted circuits not definable by a sequence of basic Boolean elements, including a first substitute circuit, wherein the sequence of basic Boolean elements and the respective substitute circuit are defined by a same truth table; c. storing the plurality of sequences of basic Boolean elements in a library; d. storing the plurality of substitute circuits in the library in a relationship corresponding to their respective sequence of basic Boolean elements; e. programming a processing path within the integrated circuit according to the first substitute circuit comprising substitute inputs and a substitute output, wherein the truth table representing the first substitute circuit is identical to the truth table representing a first sequence of basic Boolean elements representing the processing path, and wherein the first substitute circuit is not definable by a sequence of basic Boolean elements; f. reducing the first sequence of basic Boolean elements into at least one intermediate equivalent circuit; and g. generating the first substituted circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. An apparatus for reducing a throughput time of a processing path of basic logic elements within an integrated circuit, the apparatus comprising:
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a. sequence generator for generating a plurality of sequences of Boolean elements, wherein the circuit generation module is configured to generate a complimentary substitute circuit for each sequence of Boolean element generated; b. a library for storing the plurality of sequences of Boolean elements such that each Boolean element is stored in a correlation to its complimentary substituted circuit; c. a search module for searching the library for a first sequence of Boolean elements; d. a retrieval module for retrieving a substitute circuit from the library; e. a programming module for programming a first substitute circuit into the processing path of the integrated circuit, wherein the first substitute circuit is not defined by a sequence of Boolean elements, and wherein the first substitute circuit is defined by the truth table identical to a truth table defining the processing path comprised of the sequences of Boolean elements; and f. a circuit generation module configured to analyze the first sequence of Boolean elements, reduce the first sequence of Boolean elements into an intermediate circuit sequence and then generate the complimentary substitute circuit. - View Dependent Claims (14, 15, 16)
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17. A method of programming a processing path comprising an input flip flop in a MOS integrated circuit comprises:
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a generating a plurality of sequences of basic Boolean elements respectively defined by a plurality of truth tables; b. generating a respective plurality of substitute circuits not definable by a sequence of basic Boolean elements, including a first substitute circuit, wherein the sequence of basic Boolean elements and the respective substitute circuit are defined by a same truth table; c. storing the plurality of sequences of basic Boolean elements in a library; d. storing the plurality of substitute circuits in the library in a relationship corresponding to their respective sequence of basic Boolean elements; e. receiving a first sequence of basic Boolean elements; f. reducing the first sequence of basic Boolean elements to an equivalent sequence of elements; g. generating a first substitute circuit from the equivalent sequence of elements; and h. programming the processing path in the MOS integrated circuit according to the first substitute circuit, wherein the substitute circuit is not definable by a sequence of basic Boolean elements, and wherein the first substitute circuit is generated to define a first truth table that also defines the first sequence of Boolean elements.
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Specification