Electrostatic discharge protection networks for triple well semiconductor devices

• US 7,138,701 B2
• Filed: 10/02/2003
• Issued: 11/21/2006
• Est. Priority Date: 10/02/2003
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: International Business Machines Corporation
• Inventors: Voldman, Steven H., Stout, Douglas W., Pequignot, James P., Sloan, Jeffrey H.
• Primary Examiner(s): Flynn, Nathan J.
• Assistant Examiner(s): MANDALA, VICTOR A
• Application Number:
  US10/605,483
• Publication Number:
  US 20050073006A1
• Time in Patent Office: 1,146 Days
• Field of Search: 257/46, 257/104, 257/173, 257/355, 257/544, 257/546, 257/653
• US Class Current: 257/546
• CPC Class Codes: H01L 27/0255 using diodes as protective elements
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An electrostatic discharge protection network that uses triple well semiconductor devices either singularly or in a series configuration. The semiconductor devices are preferably in diode junction type configuration.

Claims

1. A triple well electrostatic discharge (ESD) network comprising:

a substrate of a first conductivity;

an insulator region residing on the surface of the substrate;

a first region of a second conductivity being partially embedded in the insulator region and the substrate;

a second region of the second conductivity being completely embedded in the substrate and partially embedded in the first region;

a third region of the second conductivity being partially embedded in the insulator region, the second region, and the substrate, the third region, second region, and first region forming a cathode coupled to a power supply;

a fourth region of the first conductivity being embedded in the insulator region and being located between the first and third regions; and

an isolation region forming a metallurgical junction between the fourth region and the first, second and third regions for the conduction of electrostatic discharee, the fourth region and isolation region forming an anode coupled to an input.

2. A triple well electrostatic discharge (ESD) network comprising:

a substrate of a first conductivity, the substrate being grounded to form an anode;

an insulator region residing on the surface of the substrate;

a first region of a second conductivity being partially embedded in the insulator region and the substrate;

a second region of the second conductivity being completely embedded in the substrate and partially embedded in the first region;

a third region of the second conductivity being partially embedded in the insulator region, the second region, and the substrate, the third region, second region, and first region forming a cathode coupled to an input;

a fourth region of the first conductivity being embedded in the insulator region and being located between the first and third regions; and

an isolation region forming a metallurgical junction between the fourth region and the first, second and third regions for the conduction of electrostatic discharge, the fourth region and isolation region.