Quadrature receiver sampling architecture
First Claim
1. A communication receiver, comprising:
- an analog front-end that is operable to receive an analog I stream and an analog Q stream;
a digital processing unit that is communicatively coupled to the analog front-end;
wherein the analog front-end includes a multiplexor and a single analog to digital convener that operate cooperatively to perform alternative digital sampling of the analog I stream and the analog Q stream thereby convening the analog I stream and the analog Q stream into a digital I stream and a digital Q stream; and
the digital processing unit is operable to perform decimation and de-rotation of a digital sample of the digital I stream and the digital Q stream, the rotation being introduced during the analog to digital conversion of the analog I stream and the analog Q stream, the digital processing unit includes a digital signal processor, wherein the digital signal processor performs mathematical operations on the digital I stream and the digital Q stream to compensate for delay that occurs during the analog to digital conversion of the analog I stream and the analog Q stream thereby performing the de-rotation of the digital sample of the digital I stream and the digital Q stream.
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Accused Products
Abstract
Quadrature receiver sampling architecture. A signal ADC performs analog to digital conversion for both I and Q streams. An analog MUX selects the appropriate I and the Q baseband analog input streams for input to the ADC at the appropriate time. A digital filter may also be employed to compensate for any introduced delay between the samples of the I and Q channel when seeking to recover the symbols that have been transmitted to a communication receiver that employs this quadrature receiver architecture and/or signal processing. In one embodiment, if an ADC is clocked at a rate of substantially twice the sample rate of the I and Q channels, there will be a one-half sample clock delay between the digital I and digital Q data at the output of the ADC. This delay is then removed before the demodulator processes the input signals to recover the transmitted symbols.
33 Citations
27 Claims
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1. A communication receiver, comprising:
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an analog front-end that is operable to receive an analog I stream and an analog Q stream; a digital processing unit that is communicatively coupled to the analog front-end; wherein the analog front-end includes a multiplexor and a single analog to digital convener that operate cooperatively to perform alternative digital sampling of the analog I stream and the analog Q stream thereby convening the analog I stream and the analog Q stream into a digital I stream and a digital Q stream; and the digital processing unit is operable to perform decimation and de-rotation of a digital sample of the digital I stream and the digital Q stream, the rotation being introduced during the analog to digital conversion of the analog I stream and the analog Q stream, the digital processing unit includes a digital signal processor, wherein the digital signal processor performs mathematical operations on the digital I stream and the digital Q stream to compensate for delay that occurs during the analog to digital conversion of the analog I stream and the analog Q stream thereby performing the de-rotation of the digital sample of the digital I stream and the digital Q stream. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A satellite communication system, comprising:
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a local satellite dish that is operable to receive an analog signal transmitted from a satellite via a wireless communication channel; and a set top box, communicatively coupled to the local satellite dish via a coaxial cable, that receives the analog signal received by the local satellite dish; wherein the set top box includes an analog front-end and a digital processing unit, the analog front-end includes a radio frequency interface; the analog front-end is operable to receive the analog signal transmitted from the satellite and to extract an analog I stream and an analog Q stream therefrom; the digital processing unit is communicatively coupled to the analog front-end; the analog front-end includes a multiplexor and a single analog to digital converter that operate cooperatively to perform alternative digital sampling of the analog I stream and the analog Q stream thereby converting the analog I stream and the analog Q stream into a digital I stream and a digital Q stream; and the digital processing unit is operable to perform decimation and de-rotation of a digital sample of the digital I stream and the digital Q stream, the rotation being introduced during the analog to digital conversion of the analog I stream and the analog Q stream;
wherein the digital processing unit includes;a digital signal processor, a delay element, and a half band interpolating filter; the delay provided by the delay element is substantially comparable to a time comprises a duration that is substantially comparable to a time required to perform a half band interpolating filtering; and wherein the delay element and the half band interpolating filter operate cooperatively to compensate for delay that occurs during the analog to digital conversion of the analog I stream and the analog Q stream thereby performing the de-rotation of the digital sample of the digital I stream and the digital Q stream. - View Dependent Claims (14, 15)
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16. A communication receiver, comprising:
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an analog front-end that is operable to receive an analog I stream and an analog Q stream; a digital processing unit that is communicatively coupled to the analog front-end; wherein the analog front-end includes a multiplexor and a single analog to digital convener that operate cooperatively to perform alternative digital sampling of the analog I stream and the analog Q stream thereby convening the analog I stream and the analog Q stream into a digital I stream and a digital Q stream; and the digital processing unit is operable to perform decimation and de-rotation of a digital sample of the digital I stream and the digital Q stream, the rotation being introduced during the analog to digital conversion of the analog I stream and the analog Q stream, wherein the digital processing unit includes; a digital signal processor, a delay element, and the half band interpolating filter; the delay provided by the delay element is substantially comparable to a time includes a duration that is substantially comparable to a time required to perform the half band interpolating filtering; and wherein the delay element and the half band interpolating filter operate cooperatively to compensate for any delay that occurs during the analog to digital conversion of the analog I stream and the analog Q stream thereby performing the de-rotation of the digital sample of the digital I stream and the digital Q stream. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27)
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Specification