Method of forming mirrors by surface transformation of empty spaces in solid state materials and structures thereon

• US 7,142,577 B2
• Filed: 05/16/2001
• Issued: 11/28/2006
• Est. Priority Date: 05/16/2001
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Marsh, Eugene P., Geusic, Joseph E.
• Primary Examiner(s): Rodriguez, Armando
• Application Number:
  US09/855,532
• Publication Number:
  US 20050070036A1
• Time in Patent Office: 2,022 Days
• Field of Search: 372/99, 372/107, 427/527
• US Class Current: 372/99
• CPC Class Codes: G02B 5/0883 with a refractive index gradient rugate filters G02B5/289
• CPC Class Codes: H01S 3/0627 the resonator being monolithic, e.g. microlaser
• CPC Class Codes: H01S 3/08059 Constructional details of the reflector, e.g. shape mirrors in general G02B5/08; mountings for mirrors G02B7/18

Abstract

A multi-layered reflective mirror formed of spaced-apart plate-shaped empty space patterns formed within a substrate is disclosed. The plurality of plate-shaped empty space patterns are formed by drilling holes in the substrate and annealing the substrate to form the spaced-apart plate-shaped empty space patterns.

Claims

1. A method of forming a reflective mirror within a substrate, comprising the act of forming a plurality of empty-spaced patterns beneath a surface of and within said substrate, said empty-spaced patterns being sequentially positioned along an optical path of said substrate and being surrounded by substrate material, said empty-spaced patterns being spaced apart to provide a predetermined refraction index corresponding to said substrate.

2. The method of claim 1, wherein said empty-spaced patterns are spaced apart uniformly.

3. The method of claim 1, wherein said empty-spaced patterns are spaced apart nonuniformly.

4. The method of claim 1, wherein said empty-spaced patterns are spaced apart to provide a maximum reflectivity value corresponding to maximum electromagnetic wave reflection for said reflective mirror.

5. The method of claim 1, wherein said act of forming said empty-spaced patterns further comprises forming a plurality of holes within said substrate and annealing said substrate to form said empty-spaced patterns beneath said surface of said material.

6. The method of claim 5, wherein said holes are cylindrical holes.

7. The method of claim 5, wherein said substrate is annealed at a temperature lower than a melting temperature of said substrate material.

8. The method of claim 7, wherein said substrate is annealed under a hydrogen ambient.

9. The method of claim 7, wherein said substrate is annealed for about 60 seconds.

10. The method of claim 1, wherein at least one of said empty-spaced Patterns has a plate-shaped configuration.

11. The method of claim 1, wherein said empty-spaced patterns are plate-shaped empty-spaced patterns.

12. The method of claim 11, wherein said plate-shaped empty-spaced patterns have same thicknesses.

13. The method of claim 11, wherein said plate-shaped empty-spaced patterns have different thicknesses.

14. The method of claim 1, wherein said empty-spaced patterns are formed simultaneously.

15. The method of claim 1, wherein said substrate is a monocrystalline substrate.

16. The method of claim 15, wherein said substrate is a silicon substrate.

17. The method of claim 15, wherein said substrate is a quartz substrate.

18. The method of claim 15, wherein said substrate is a germanium substrate.

19. The method of claim 1, wherein said substrate is a gallium arsenide substrate.

20. The method of claim 1, wherein said substrate is an indium gallium arsenide substrate.

21. A method of forming a reflective mirror within a substrate, said method comprising the acts of:

forming a plurality of cylindrical holes within said substrate, each of said plurality of cylindrical holes being defined by a radius R=λ

/4 [2k+1)/n+(2m+1)](1/8.89), wherein λ

is a wavelength for which the reflectivity of said reflective mirror is maximum, n is the refraction index of said substrate, and k and m are real integers, and wherein any two adjacent cylindrical holes are spaced apart by a distance Δ

N2=27.83 R3/(2m+1)λ

/4; and

annealing said substrate to form at least one empty-spaced pattern beneath a surface of and within said substrate, said empty-spaced pattern being positioned along an optical path of said substrate.

22. The method of claim 21 further comprising the act of forming a plurality of empty-spaced patterns beneath said surface of said substrate, said empty-spaced patterns being sequentially positioned along said optical path of said substrate and being surrounded by substrate material.

23. The method of claim 22, wherein said substrate is annealed at a temperature lower than a melting temperature of said substrate.

24. The method of claim 23, wherein said substrate is annealed under a hydrogen ambient.

25. The method of claim 22, wherein said empty-spaced patterns are plate-shaped empty-spaced patterns.

26. The method of claim 25, wherein said plate-shaped empty-spaced patterns have same thicknesses.

27. The method of claim 25, wherein said plate-shaped empty-spaced patterns have different thicknesses.

28. The method of claim 25, wherein said plate-shaped empty-spaced patterns are formed simultaneously.

29. The method of claim 25, wherein said plate-shaped empty-spaced patterns are spaced apart uniformly.

30. The method of claim 25, wherein said plate-shaped empty-spaced patterns are spaced apart non-uniformly.

31. The method of claim 22, wherein said substrate is a monocrystalline substrate.

32. The method of claim 31, wherein said substrate is a silicon substrate.

33. The method of claim 31, wherein said substrate is a quartz substrate.

34. The method of claim 31, wherein said substrate is a germanium substrate.

35. The method of claim 22, wherein said substrate is a gallium arsenide substrate.

36. The method of claim 22, wherein said substrate is an indium gallium arsenide substrate.

37. An integrated circuit substrate comprising at least one reflective mirror provided beneath a surface of, and within, a semiconductor substrate, said reflective mirror comprising at least one empty-spaced pattern beneath said surface of and within said substrate, said at least one empty-spaced pattern being positioned along an optical path of said substrate and being surrounded by substrate material.

38. The integrated circuit of claim 37 further comprising a plurality of empty-spaced patterns beneath said surface of and within said substrate, said empty-spaced patterns being sequentially positioned along said optical path of said substrate and being surrounded by said substrate material.

39. The integrated circuit of claim 38, wherein said plurality of empty-spaced patterns are spaced apart uniformly.

40. The integrated circuit of claim 38, wherein said plurality of empty-spaced patterns are spaced apart non-uniformly.

41. The integrated circuit of claim 38, wherein each of said plurality of empty-spaced patterns has a respective refraction index.

42. The integrated circuit of claim 38, wherein said plurality of empty-spaced patterns has a maximum reflectivity value corresponding to maximum electromagnetic wave reflection for said reflective mirror.

43. The integrated circuit of claim 38, wherein said empty-spaced patterns are plate-shaped empty-spaced patterns.

44. The integrated circuit of claim 43, wherein said plate-shaped empty-spaced patterns have same thicknesses.

45. The integrated circuit of claim 43, wherein said plate-shaped empty-spaced patterns have different thicknesses.

46. The integrated circuit of claim 38, wherein said semiconductor substrate is a silicon substrate.

47. The integrated circuit of claim 38, wherein said semiconductor substrate is a quartz substrate.

48. The integrated circuit of claim 38, wherein said semiconductor substrate is a germanium substrate.

49. The integrated circuit of claim 38, wherein said semiconductor substrate is a silicon-on-insulator substrate.

50. The integrated circuit of claim 38, wherein said semiconductor substrate is a silicon-on-nothing substrate.

51. The integrated circuit of claim 38, wherein said semiconductor substrate includes a laser.

52. The integrated circuit of claim 51, wherein said laser is a vertical cavity laser and said reflective mirror being is located below a junction of said vertical cavity laser.

53. The integrated circuit of claim 51, wherein said laser is a solid state ion laser, said reflective mirror being embedded within at least one end face of such solid state ion laser.

54. A laser device comprising a laser body for producing laser light and at least one mirror coupled to said laser body to reflect said laser light, said at least one mirror comprising at least one empty-spaced pattern beneath a surface of and within a substrate, said empty-spaced pattern being positioned along an optical path of said laser device and being surrounded by substrate material.

55. The laser device of claim 54, wherein said at least one mirror further comprises a plurality of empty-spaced patterns beneath said surface of and within said substrate, said empty-spaced patterns being sequentially positioned along said optical path of said laser device and being surrounded by said substrate material.

56. The laser device of claim 55, wherein said plurality of empty-spaced patterns are spaced apart uniformly.

57. The laser device of claim 55, wherein said plurality of empty-spaced patterns are spaced apart non-uniformly.

58. The laser device of claim 55, wherein each of said plurality of empty-spaced patterns has a respective refraction index.

59. The laser device of claim 55, wherein said plurality of empty-spaced patterns has a maximum reflectivity value corresponding to maximum laser wave reflection for said reflective mirror.

60. The laser device of claim 55, wherein said empty-spaced patterns are plate-shaped empty-spaced patterns.

61. The laser device of claim 60, wherein said plate-shaped empty-spaced patterns have same thicknesses.

62. The laser device of claim 60, wherein said plate-shaped empty-spaced patterns have different thicknesses.

63. The laser device of claim 54 further comprising at least two said mirrors coupled to opposite sides of said laser body to reflect said laser light.