Resonance reduction arrangements
First Claim
Patent Images
1. A resonance reduction circuit comprising:
- a resonance sensor to detect for predetermined resonance at a circuit location; and
a charge dumper to dump charges at least one of from and to the circuit location upon detection of the predetermined resonance by the resonance sensor, the charge dumper comprising at least one gating transistor to dump the charges, the at least one gating transistor directly connected to a first power supply line having a first potential and a second power supply line having a second potential of a different potential than the first potential.
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Abstract
Resonance reduction arrangements to reduce the impact of power supply resonance on circuits, comprising a resonance sensor and a charge dumper, wherein upon the detection of the predetermined resonance by the resonance sensor at a circuit location, the charge dumper dumps charges at least one of from and to the circuit location, wherein the charge dumper comprises at least one gating transistor to dump the charges, the at least one gating transistor is directly connected to a first power supply line having a first potential and a second power supply line having a second potential of a different potential than the first potential.
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Citations
22 Claims
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1. A resonance reduction circuit comprising:
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a resonance sensor to detect for predetermined resonance at a circuit location; and a charge dumper to dump charges at least one of from and to the circuit location upon detection of the predetermined resonance by the resonance sensor, the charge dumper comprising at least one gating transistor to dump the charges, the at least one gating transistor directly connected to a first power supply line having a first potential and a second power supply line having a second potential of a different potential than the first potential. - View Dependent Claims (2, 3, 4)
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5. An integrated circuit (IC) comprising:
a resonance reduction circuit including; a resonance sensor to detect for predetermined resonance at a circuit location; and a charge dumper to dump charges at least one of from and to the circuit location upon detection of the predetermined resonance by the resonance sensor, the charge dumper comprising at least one gating transistor to dump the charges, the at least one gating transistor directly connected to a first power supply line having a first potential and a second power supply line having a second potential of a different potential than the first potential. - View Dependent Claims (6, 7, 8)
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9. An electronic package comprising:
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a die; and a resonance reduction circuit including; a resonance sensor to detect for predetermined resonance at a circuit location of the electronic package; and a charge dumper to dump charges at least one of from and to the circuit location upon detection of the predetermined resonance by the resonance sensor, the charge dumper comprising at least one gating transistor to dump the charges, the at least one gating transistor directly connected to a first power supply line having a first potential and a second power supply line having a second potential of a different potential than the first potential. - View Dependent Claims (10, 11, 12)
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13. A system comprising:
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at least one item selected from a list of;
an electronic package, PCB, socket, bus portion, input device, output device, power supply arrangement and case; anda resonance reduction circuit including; a resonance sensor to detect for predetermined resonance at a circuit location; and a charge dumper to dump charges at least one of from and to the circuit location upon detection of the predetermined resonance by the resonance sensor, the charge dumper comprising at least one gating transistor to dump the charges, the at least one gating transistor directly connected to a first power supply line having a first potential and a second power supply line having a second potential of a different potential than the first potential. - View Dependent Claims (14, 15, 16)
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17. A resonance reduction method comprising:
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detecting for predetermined resonance at a circuit location; and dumping charges at least one of from and to the circuit location upon detection of the predetermined resonance by using at least one gating transistor, the at least one gating transistor directly connected to a first power supply line having a first potential and a second power supply line having a second potential of a different potential than the first potential. - View Dependent Claims (18, 19, 20)
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21. A method for reducing resonance comprising:
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sensing resonance; providing a signal to a charge dissipation stage when resonance is sensed;
recognizing the signal; anddissipating charges from a first potential to a second potential where the second potential is lower than the first potential with at least one gating transistor, the at least one gating transistor directly connected to a first power supply line having a first potential and a second power supply line having a second potential of a different potential than the first potential.
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22. A mounted electrical component arrangement comprising:
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a plurality of electrical components; and a circuit to reduce power supply package resonance mounted to a substrate within at least one of the electrical components, with the circuit including a sensing stage to detect resonance and a current dissipation stage to dump charges from a first potential to a second potential where the second potential is lower than the first potential, the current dissipation stage comprising at least one gating transistor to dump the charges, the at least one gating transistor directly connected to a first power supply line having a first potential and a second power supply line having a second potential of a different potential than the first potential.
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Specification