Active matrix display device

• US 7,145,176 B2
• Filed: 08/29/2001
• Issued: 12/05/2006
• Est. Priority Date: 04/05/2001
• Status: Expired due to Term

• Current Assignee: Panasonic Intellectual Property Corporation of America (Panasonic Holdings Corporation)
• Original Assignee: Hitachi, Ltd.
• Inventors: Wakagi, Masatoshi, Kawasaki, Masahiro, Ando, Masahiko
• Primary Examiner(s): Flynn, Nathan J.
• Assistant Examiner(s): Erdem, Fazli
• Application Number:
  US09/940,885
• Publication Number:
  US 20020145143A1
• Time in Patent Office: 1,924 Days
• Field of Search: 349/43, 349/46, 349/42, 349/122, 349/138, 349/160, 349/38
• US Class Current: 257/72
• CPC Class Codes: G02F 1/133357 Planarisation layers
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2202/104 poly-Si
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/66772 Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates H01L29/66666 takes precedence; thin film FinFETs H01L29/66795
• CPC Class Codes: H01L 29/78654 Monocrystalline silicon transistors
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An active matrix display device using a thin film transistor as a switching element in the displaying portion or driving portion is characterized in that said thin film transistor includes an insulating substrate on which a gate electrode, a gate insulating film, a semiconductor layer, a drain electrode, a source electrode and a passivation film are successively laminated. The thin film transistor is further characterized such that the surface portion of the semiconductor layer on the side of the passivation film is porous, which enables the device to be stably driven with a low off-current even in the case of disposing an organic passivation film and a picture element electrode on the thin film transistor.

Claims

1. An active matrix display device using a thin film transistor as a switching element in the displaying portion or driving portion wherein said thin film transistor comprises an insulating substrate on which a gate electrode, a gate insulating film, a semiconductor layer, a drain electrode, a source electrode and a passivation film are successively laminated, and the surface portion of the semiconductor layer on the passivation film side is porous, wherein depth of the porous portion is not less than 1 nm and not more than 30 nm from the surface of the semiconductor layer on the passivation film side.

2. An active matrix display device according to claim 1, wherein said surface portion of the semiconductor layer is an amorphous Si region formed on the semiconductor layer.

3. An active matrix display device using a thin film transistor as a switching element in the displaying portion or driving portion wherein said thin film transistor comprises an insulating substrate on which a gate electrode, a gate insulating film, a semiconductor layer, a drain electrode, a source electrode and a passivation film are successively laminated, and the surface portion of the semiconductor layer on the passivation film side is porous, wherein not less than 0.01 atom % and not more than 0.1 atom % of helium is contained in the porous area of not more than 30 nm in depth from the surface of the semiconductor layer on the passivation film side.

4. An active matrix display device using a thin film transistor as a switching element in the displaying portion or driving portion wherein said thin film transistor comprises an insulating substrate on which a gate electrode, a gate insulating film, a semiconductor layer, a drain electrode, a source electrode and a passivation film are successively laminated, and the surface portion of the semiconductor layer on the passivation film side is porous, wherein the current value between the source electrode and the drain electrode in the case of applying a voltage of −

40 V to +40 V to a second electrode (a back gate electrode) provided on the switching element is not more than 10 times the current value between the source electrode and the drain electrode in the case of providing no back gate electrode.

5. An active matrix display device, using a thin film transistor as a switching element in the displaying portion or driving portion wherein said thin film transistor comprises an insulating substrate on which a gate electrode, a gate insulating film, a semiconductor layer, a drain electrode, a source electrode and a passivation film are successively laminated, and means, formed on a surface portion of the semiconductor layer between the semiconductor layer and the passivation film, for preventing fixed charges from the passivation film from entering the semiconductor layer, wherein said means comprises a porous semiconductor region formed between semiconductor layer and said passivation film, and wherein depth of the porous semiconductor region is not less than 1 nm and not more than 30 nm from the surface of the semiconductor layer on the passivation film side.

6. An active matrix display device according to claim 5, wherein the passivation film is of an organic resin.

7. An active matrix display device according to claim 5, wherein a picture element electrode formed on the passivation film of the switching element overlaps the switching element.

8. An active matrix display device according to claim 5, wherein a common electrode formed on the passivation film of the switching element overlaps the switching element.

9. An active matrix display device according to claim 5, wherein said porous semiconductor region is an amorphous Si region.

10. An active matrix display device using a thin film transistor as a switching element in the displaying portion or driving portion wherein said thin film transistor comprises an insulating substrate on which a gate electrode, a gate insulating film, a semiconductor layer, a drain electrode, a source electrode and a passivation film are successively laminated, and means, formed on a surface portion of the semiconductor layer between the semiconductor layer and the passivation film, for preventing fixed charges from the passivation film from entering the semiconductor layer, wherein said means comprises a porous semiconductor region formed between semiconductor layer and said passivation film, and wherein volume of the voids is not less than 5% in the porous semiconductor region of not less than 1 nm and not more than 30 nm from the surface of the semiconductor layer on the passivation film side.

11. An active matrix display device using a thin film transistor as a switching element in the displaying portion or driving portion wherein said thin film transistor comprises an insulating substrate on which a gate electrode, a gate insulating film, a semiconductor layer, a drain electrode, a source electrode and a passivation film are successively laminated, and means, formed on a surface portion of the semiconductor layer between the semiconductor layer and the passivation film, for preventing fixed charges from the passivation film from entering the semiconductor layer, wherein said means comprises a porous semiconductor region formed between semiconductor layer and said passivation film, and wherein not less than 0.01 atom % and not more than 0.1 atom % of helium is contained in the porous semiconductor region of not more than 30 nm in depth from the surface of the semiconductor layer on the passivation film side.

12. An active matrix display device using a thin film transistor as a switching element in the displaying portion or driving portion wherein said thin film transistor comprises an insulating substrate on which a gate electrode, a gate insulating film, a semiconductor layer, a drain electrode, a source electrode and a passivation film are successively laminated, and means, formed on a surface portion of the semiconductor layer between the semiconductor layer and the passivation film, for preventing fixed charges from the passivation film from entering the semiconductor layer, wherein said means comprises a porous semiconductor region formed between semiconductor layer and said passivation film, and wherein the current value between the source electrode and the drain electrode in the case of applying a voltage of −

40 V to +40 V to a second electrode (a back gate electrode) provided on the switching element is not more than 10 times the current value between the source electrode and the drain electrode in the case of providing no back gate electrode.

13. An active matrix display device using a thin film transistor as a switching element in the displaying portion or driving portion wherein said thin film transistor comprises an insulating substrate on which a gate electrode, a gate insulating film, a semiconductor layer, a drain electrode, a source electrode and a passivation film are successively laminated, and the surface portion of the semiconductor layer on the passivation film side is porous, wherein volume of the voids is not less than 5% in the porous area of not less than 1 nm and not more than 30 nm from the surface of the semiconductor layer on the passivation film side.