Apparatus producing continuous stream of correlation values

• US 7,145,938 B2
• Filed: 12/12/2000
• Issued: 12/05/2006
• Est. Priority Date: 12/14/1999
• Status: Expired due to Fees

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Kawaguchi, Noriyuki, Minowa, Morihiko, Takeuchi, Masatsugu
• Primary Examiner(s): Fan, Chieh M.
• Assistant Examiner(s): Perilla, Jason M.
• Application Number:
  US09/734,856
• Publication Number:
  US 20010004378A1
• Time in Patent Office: 2,184 Days
• Field of Search: 375130-153, 375/206, 375/205, 375/316, 375/343, 370/18, 370/19, 370/20, 370/110, 370/342, 364/728, 364/715
• US Class Current: 375/147
• CPC Class Codes: H04B 1/7075 with code phase acquisition
• CPC Class Codes: H04B 1/708 Parallel implementation
• CPC Class Codes: H04B 1/7117 Selection, re-selection, allocation or re-allocation of paths to fingers, e.g. timing offset control of allocated fingers
• CPC Class Codes: H04B 2201/70707 Efficiency-related aspects

Abstract

An apparatus includes a plurality of received-signal registers which receive and store therein a plurality of respective received-signal sequences, a selector which selects one of the received signal sequences stored in the received-signal registers, at least one code register which stores therein a de-spreading-code sequence, a multiplication circuit which multiplies the selected one of the received-signal sequences by the de-spreading-code sequence, and a summation circuit which obtains a sum of results of the multiplication to obtain a correlation between the selected one of the received-signal sequences and the de-spreading-code sequence.

Claims

1. An apparatus, comprising:

a plurality of received-signal registers which receive and store therein a plurality of respective received-signal sequences;

a first selector which selects one of the received signal sequences stored in said received-signal registers;

at least one code register which stores therein a de-spreading-code sequence;

a multiplication circuit which multiplies the selected one of the received-signal sequences by the de-spreading-code sequence; and

a summation circuit which obtains a sum of results of the multiplication to obtain a correlation between the selected one of the received-signal sequences and the de-spreading-code sequence;

wherein said at least one code register includes a first code register storing a first de-spreading code and a second code register storing a second de-spreading code, wherein the pattern of the first de-spreading code and the pattern of the second de-spreading code are different, and said apparatus further comprising a second selector which selects one of said first code register and said second code register to select and supply the de-spreading-code sequence to the multiplication circuit, and

wherein while the correlation between the selected received signal sequences of the selected received-signal register and the selected one of the de-spreading-code patterns is being obtained, a received signal sequences of another received-signal registers of the plurality of received signal registers is replaced.

2. The apparatus as claimed in claim 1, further comprising:

a delay-profile-holding unit which generates a delay profile based on correlations obtained by the summation circuit; and

a path-timing-detection circuit which detect a path timing by detecting a peak of the delay profile.

3. An apparatus, comprising:

a plurality of received-signal registers which receive and store therein a plurality of respective received-signal sequences;

a selector which selects one of the received signal sequences stored in said received-signal registers;

at least one code register which stores therein a de-spreading-code sequence;

a multiplication circuit which multiplies the selected one of the received-signal sequences by the de-spreading-code sequence;

a summation circuit which obtains a sum of results of the multiplication to obtain a correlation between the selected one of the received-signal sequences and the de-spreading-code sequence

a delay-profile-holding unit which generates a delay profile based on correlations obtained by the summation circuit;

a path-timing-detection circuit which detect a path timing by detecting a peak of the delay profile;

a first sequence-order-control circuit which converts a single received-signal sequence arranged in a first order into k received-signal sequences arranged in a second order where k is an integer more than one, the k received-signal sequences being supplied to said plurality of received-signal registers; and

a second sequence-order-control circuit which converts the delay profile from one corresponding to the second order to one corresponding to the first order.

4. The apparatus as claimed in claim 3, wherein the single received-signal sequence has a spreading factor m, where m is an integer, and an over-sample ratio that is equal to k, and each of the k received-signal sequences has m samples therein, and wherein each of said plurality of received-signal registers has m stages.

5. An apparatus, comprising:

a plurality of received-signal registers which receive and store therein a plurality of respective received-signal sequences;

a first selector which selects one of the received signal sequences stored in said received-signal registers;

at least one code register which stores therein a de-spreading-code sequence;

a multiplication circuit which multiplies the selected one of the received-signal sequences by the de-spreading-code sequence;

a summation circuit which obtains a sum of results of the multiplication to obtain a correlation between the selected one of the received-signal sequences and the de-spreading-code sequence;

N received-signal-holding units which hold therein N received-signal sequences, where N is an integer;

a second selector which successively selects one of said N received-signal-holding units, and supplies the successively selected one of the N received-signal sequences to said plurality of received-signal registers at a speed N times faster than sampling speed of the N received-signal sequences;

N delay-profile-holding units which generate N delay profiles corresponding to the N received-signal sequences based on correlations obtained by the summation circuit;

a third selector which successively selects one of said N delay-profile-holding units, and supplies the successively selected one of the N delay profiles; and

a path-timing-detection circuit which detect a path timing by detecting a peak of the successively selected one of the N delay profiles.

6. An apparatus for obtaining a correlation wherein a carrelation calculating unit calculates the correlation while shifting, relative to a de-spreading code, a phase of received signal spread by a spreading code, comprising:

a first shift register configured to store a first received signal;

a second shift register configured to store a second received signal;

a selector unit configured to selectively output one of the first received signal and the second received signal; and

a control unit configured to cause said selector unit to output the first received signal and to cause the correlation calculating unit to calculate a correlation with respect to the first received signal, followed by causing said selector unit to output the second received signal and by causing the correlation calculating unit to calculate a correlation with respect to the second received signal;

wherein the first received signal is a signal spread by a first spreading code and the second received signal is a signal spread by a second spreading code, said apparatus further comprising;

a de-spreading code selecting unit configured to select a first de-spreading code from a first code register, said first de-spreading code corresponding to the first spreading code for correlation calculation of the first received signal, and to select a second de-spreading code from a second code register, said second de-spreading code corresponding to the second spreading code for correlation calculation of the second received signal, such that each of a pattern of the first spreading code and a pattern of the second spreading code are different,

wherein said second shift register shifts second received signal to set the second received signal to a predetermined phase while correlation calculation is being performed for the first received signal.

7. An apparatus for obtaining a correlation wherein a correlation calculating unit calculates the correlation while shifting, relative to a de-spreading code, a phase of a signal spread by a spreading code, comprising:

a first shift register configured to store a first received signal;

a second shift register configured to store a second received signal;

a selector unit configured to selectively output one of the first received signal and the second received signal; and

a control unit configured to cause said selector unit to output the first received signal and to cause the correlation calculating unit to calculate a correlation with respect to the first received signal, followed by causing said selector unit to output the second received signal and by causing the correlation calculating unit to calculate a correlation with respect to the second received signal,

wherein a received signal is oversampled and picked every few samples to generate two or more sequences, and wherein the first received signal is a first one of the two or more sequences and the second received signal is a second one of the two or more sequences, the correlation calculations of the first received signal and the second received signal being preformed by use of a common de-spreading code, and

wherein said second shift register shifts the second received signal to set the second received signal to a predetermined phase while correlation calculation is being performed for the first received signal.