Method and device for protecting integrated circuits against piracy
First Claim
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1. A method of protecting an integrated circuit against piracy, the integrated circuit comprising a central processing unit (CPU) and at least one associated timer, the method comprising:
- at the CPU, performing an initialization processing sequence;
at the CPU, detecting the state of the at least one timer after performing the initialization processing sequence and before performing a predetermined processing sequence;
if the at least one timer is not activated, activating the at least one timer and performing the predetermined processing sequence; and
if the at least one timer is activated, disabling the integrated circuit.
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Abstract
Before a predetermined processing sequence, the integrated circuit detects the state of at least one timer. The circuit controls the activation of the timer if it is not activated, and disables itself if the timer is activated.
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Citations
15 Claims
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1. A method of protecting an integrated circuit against piracy, the integrated circuit comprising a central processing unit (CPU) and at least one associated timer, the method comprising:
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at the CPU, performing an initialization processing sequence; at the CPU, detecting the state of the at least one timer after performing the initialization processing sequence and before performing a predetermined processing sequence; if the at least one timer is not activated, activating the at least one timer and performing the predetermined processing sequence; and if the at least one timer is activated, disabling the integrated circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. An integrated circuit (IC) comprising:
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a central processing unit (CPU); and at least one timer circuit for protecting the IC against piracy and comprising a timer which is activated when the IC is powered-on and for a predetermined duration when the IC is powered-off, a timer activating circuit for activating the timer, a timer deactivating circuit for deactivating the timer, and a detection circuit for detecting the state of the timer; the CPU detecting the state of the timer after performing an initialization processing sequence and before performing a predetermined processing sequence, and, if the timer is not activated, activating the timer and performing the predetermined processing sequence; and the CPU disabling the IC at predefined times if the timer is in the activated state. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15)
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Specification