Closed loop power control with high dynamic range

• US 7,148,749 B2
• Filed: 01/31/2005
• Issued: 12/12/2006
• Est. Priority Date: 01/31/2005
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Premakanthan, Pravinkumar, Rahman, Mahibur, Ivonnet, Jorge
• Primary Examiner(s): Choe, Henry
• Application Number:
  US11/046,910
• Publication Number:
  US 20060170499A1
• Time in Patent Office: 680 Days
• Field of Search: 330/279, 330/285, 330/291, 330/296
• US Class Current: 330/279
• CPC Class Codes: H03G 3/3047 for intermittent signals, e.g. burst signals

Abstract

A method (500) and apparatus (300, 400, 601) facilitate closed loop transmit power control in a power control loop at and during a transition from one transmit power level to another transmit power level in a transmitter. The apparatus includes a reference path (326) configured to provide a reference signal (325) and a gain compensation signal (417), a detect path (327) configured to process, in accordance with the gain compensation signal, a detected signal corresponding to a power level to provide a gain compensated detected signal; and a power control path (328) configured to generate a power control value in accordance with the reference signal, the gain compensated detected signal, and a loop compensation factor associated with the gain compensation signal where the power control value is suitable for setting the power level for the transmission.

Claims

1. An integrated circuit (IC) configured to facilitate transmit power control during and between different power levels associated with a transmission, the IC comprising:

a reference path configured to provide a reference signal and a gain compensation signal;

a detect path configured to process, in accordance with the gain compensation signal, a detected signal corresponding to a power level to provide a gain compensated detected signal; and

a power control path configured to generate a power control value in accordance with the reference signal, the gain compensated detected signal, and a loop compensation factor associated with the gain compensation signal, the power control value suitable for setting the power level for the transmission.

2. An integrated circuit (IC) in accordance with claim 1, wherein the reference path further comprises:

a delay unit, coupled to the gain compensation signal, configured to provide a delayed compensation signal; and

a gain compensator, coupled to the delayed compensation signal, and configured to apply gain compensation to a ramp signal to provide the reference signal.

3. An integrated circuit (IC) in accordance with claim 2, wherein the reference path further comprises a comparison unit coupled to the ramp signal and configured to provide the gain compensation signal, the gain compensation signal corresponding to an amplitude of the ramp signal.

4. An integrated circuit (IC) in accordance with claim 1, wherein the reference path further includes:

a first register configured to store a new transmit power level;

a second register configured to store a previous transmit power level;

a difference node configured to generate a difference between the new transmit power level and the previous transmit power level, the difference including a magnitude and a sign;

a Look Up Table (LUT) containing a plurality of reference ramp profiles; and

a ramp generator configured to generate a ramp signal corresponding to the reference signal, the ramp generator comprising a multiplier for multiplying the magnitude of the difference with one of the plurality of reference ramp profile values obtained from the LUT to provide an intermediate ramp signal and an adder for adding the intermediate ramp signal to one of the new transmit power level and the previous transmit power level based on the sign.

5. An integrated circuit (IC) in accordance with claim 1, wherein the detect path further comprises an analog gain stage configured to apply an analog gain value to the detected signal, the analog gain value corresponding to the gain compensation signal.

6. An integrated circuit (IC) in accordance with claim 5, wherein the detect path further includes an Analog to Digital Converter configured to convert an output signal from the analog gain stage to the gain compensated detected signal.

7. An integrated circuit (IC) in accordance with claim 1, wherein the power control path further comprises a multiplier configured to generate the power control value by multiplying an error signal and the loop compensation factor, the error signal derived from a difference between the reference signal and gain compensated detected signal.

8. An integrated circuit (IC) in accordance with claim 7, wherein the power control path further comprises a loop compensation unit coupled to a delayed compensation signal corresponding to the gain compensation signal and configured to provide the loop compensation factor, the loop compensation factor including a reciprocal of a gain compensation factor associated with the gain compensation signal.

9. An integrated circuit (IC) in accordance with claim 1, wherein:

the detect path includes a variable gain amplifier driving an analog to digital converter and having a gain corresponding to the gain compensation signal;

the reference path includes a delay unit coupled a gain compensator collectively configured to provide, for the reference signal, gain compensation corresponding to the gain compensation signal and delay compensation corresponding to a time delay associated with the detect path; and

the power control path includes a loop compensation unit configured to apply the loop compensation factor to an error signal to provide the power control value, the error signal corresponding to the reference signal and the gain compensated detected signal, the loop compensation factor accounting for the time delay and being inversely proportional to the gain compensation for the reference signal.

10. An integrated circuit (IC) in accordance with claim 1, further comprising a transmit amplifier with a gain controlled in accordance with the power control value and configured to provide an output signal corresponding to the detected signal.

11. An integrated circuit (IC) in accordance with claim 1, configured to facilitate power control during a transmit power transition between the different power levels, the transmit power transition including one of a channel-to-channel transition, a timeslot-to-timeslot transition, and a frequency-to-frequency transition.

12. A method for facilitating transmit power control between different power levels associated with a transmission, the method comprising:

generating a gain compensation value corresponding to a reference signal in a reference path of a power control loop, the power control loop further including a detect path and a power control path;

changing a gain applied to a detected signal in the detect path based on the gain compensation value to provide a gain compensated detected signal; and

providing a power control value in accordance with the reference signal, the gain compensated detected signal, and a loop compensation factor corresponding to the gain compensation value, the power control value suitable for setting the power level for the transmission.

13. A method in accordance with claim 12, wherein generating the gain compensation value further comprises comparing a ramp signal to one or more thresholds and selecting a gain compensation value based on the comparing.

14. A method in accordance with claim 12, further comprising generating the reference signal from one of a ramp up profile and a ramp down profile obtained from a Look Up Table (LUT) containing a plurality of reference ramp profile values.

15. A method in accordance with claim 14, wherein the generating the reference signal further comprises compensating a signal for delay in the detect path and according to the gain compensation value.

16. A transmitter system for facilitating power control during a transition from a first power level to a second power level, the transmitter system comprising:

a transmitter amplifier, having a signal input, a signal output, and a gain control input; and

a power control system coupled to the transmitter amplifier and configured to provide a gain control value coupled to the gain control input, the power control system comprising;

a reference signal generator configured to provide a reference signal using a ramp profile corresponding to the transition from the first power level to the second power level;

a detector coupled to the signal output of the transmitter amplifier and the reference signal generator, the detector configured to provide a feedback signal corresponding to a signal level at the signal output; and

control circuitry, coupled to the reference signal generator and the feedback signal from the detector, the control circuitry configured to provide the gain control value, the gain control value corresponding to the reference signal and the feedback signal.

17. A transmitter system in accordance with claim 16, wherein the detector further comprises an analog gain unit arranged to drive an analog to digital converter to provide the feedback signal, the analog gain unit having a gain that is controlled by a gain compensation signal provided by the reference signal generator, the gain controlled to limit the amplitude range of the feedback signal.

18. A transmitter system in accordance with claim 17, wherein the reference signal generator further comprises a comparison unit coupled to the ramp profile for providing the gain compensation signal according to a range of the ramp profile and a gain compensator for applying gain compensation to the ramp profile to provide the reference signal.

19. A transmitter system in accordance with claim 18, wherein the reference signal generator further comprises a delay unit coupled to the gain compensation signal to control the gain compensator to compensate for delay through the analog to digital converter.

20. A transmitter system in accordance with claim 17, wherein the control circuitry further comprises a loop compensation unit configured to apply gain compensation corresponding to the gain compensation signal in accordance with a delay through the analog to digital converter.