VCO gain tuning using voltage measurements and frequency iteration

• US 7,148,760 B2
• Filed: 12/30/2004
• Issued: 12/12/2006
• Est. Priority Date: 12/30/2004
• Status: Active Grant

• Current Assignee: Nokia Technologies Oy (Nokia Corporation)
• Original Assignee: Nokia Corporation
• Inventors: Väänänen, Paavo
• Primary Examiner(s): MIS, DAVID C
• Application Number:
  US11/026,560
• Publication Number:
  US 20060145767A1
• Time in Patent Office: 712 Days
• Field of Search: 331/1.A, 331/10, 331/11, 331/14, 331 16- 18, 331/25, 331/44, 331/179, 327156-159, 329/325, 332/127, 360/51, 375/376, 455/260
• US Class Current: 331/25
• CPC Class Codes: H03J 2200/10 Tuning of a resonator by means of digitally controlled capacitor bank
• CPC Class Codes: H03J 2200/29 Self-calibration of a receiver
• CPC Class Codes: H03J 2200/36 Circuit arrangements for, e.g. increasing the tuning range, linearizing the voltage-capacitance relationship, lowering noise, constant slope in different bands
• CPC Class Codes: H03J 7/023 Neutralization of the automatic frequency correction during a tuning change
• CPC Class Codes: H03J 7/065 the counter or frequency divider being used in a phase locked loop
• CPC Class Codes: H03J 7/10 Modification of automatic frequency control sensitivity or linearising automatic frequency control operation
• CPC Class Codes: H03L 7/099 concerning mainly the controlled oscillator of the loop
• CPC Class Codes: H03L 7/18 using a frequency divider or counter in the loop H03L7/20, H03L7/22 take precedence

Abstract

This invention describes a method for gain tuning of a voltage-controlled oscillator of a phase locked loop (PLL) of an electronic device using voltage measurements and a frequency iteration. The invention presents a method of minimizing integrated VCO gain variations. More specifically, the invention implementation is based on an analysis which includes changing the VCO frequency by iteration steps and optionally calculating said iteration steps and measuring a gain of said voltage controlled oscillator (VCO) at said frequencies changed by the iteration steps, wherein the analysis is based on a predetermined criterion. The present invention can be used in any radio architecture that requires limiting of the VCO gain variation and tuning its center frequency.

Claims

1. A method comprising:

providing a VCO output signal of a voltage controlled oscillator to a phase detector module of a phase locked loop PLL, wherein a frequency of said VCO output signal is divided by an adjustable number determined by a divider control signal thus generating a divided VCO output signal, said adjustable number being equal to or larger than one;

providing a reference frequency signal comprising a stable reference frequency corresponding to said frequency divided by said adjustable number to said phase detector module;

generating a PD error signal by a phase detector module in response to said divided VCO output signal, further in response to said reference frequency signal and in response to said divider control signal, wherein a VCO tuning voltage signal is one of;

a) said PD error signal, and b) said PD error signal filtered by a low-pass filter;

generating a calibration signal and said divider control signal by a calibration control module in response to said VCO tuning voltage signal according to a predetermined criterion; and

providing said VCO tuning voltage signal and said calibration signal to said voltage controlled oscillator for implementing gain tuning of said VCO output signal of said voltage controlled oscillator according to said predetermined criterion.

2. The method of claim 1, wherein said VCO tuning voltage signal and said calibration signal are generated by analyzing, according to said predetermined criterion, at least one of:

a) said VCO output signal and

b) a selected number of previous VCO output signals provided to said calibration control module at pre-selected past time periods, wherein said pre-selected number is an integer of at least a value of one.

3. The method of claim 2, wherein said analysis performed using said predetermined criterion comprises at least one of:

a) changing said frequency by iteration steps,

b) calculating said iteration steps, and

c) measuring a gain of said voltage controlled oscillator at said frequency changed by said iteration steps.

4. The method of claim 1, wherein said low-pass filtering of said PD error signal is performed by a low-pass filter.

5. The method of claim 1, wherein said divided VCO output signal is generated by a divider in response to said VCO output signal and to said divider control signal, and a clock signal indicative of said divided frequency is generated by said divider.

6. The method of claim 5, wherein said VCO tuning voltage signal is an analog format and converted to a digital format by an ADC block using said clock signal before said VCO tuning voltage signal is provided to said calibration control module.

7. The method of claim 1, wherein said VCO tuning voltage signal is provided to a voltage controlled oscillator core of said voltage controlled oscillator and said VCO tuning voltage signal is an analog signal.

8. The method of claim 1, wherein said calibration signal is provided to a VCO calibration block of said voltage controlled oscillator, wherein said calibration signal is a digital signal and said VCO calibration block is a digitally controlled capacitor.

9. The method of claim 1, wherein said voltage controlled oscillator VCO is a part of an electronic communication device and used for transmitting or for receiving information in said electronic communication device.

10. The method of claim 9, wherein said electronic communication device is a transmitter or a receiver, or both said transmitter and said receiver, or a portable communication device, or a mobile electronic device or a mobile phone.

11. The method of claim 9, wherein a user of said electronic communication device programs said calibration control module through a user interface for entering said predetermined criterion.

12. The method of claim 1, wherein said phase detector module contains a phase detector and a charge pump.

13. A computer program product comprising:

a computer readable storage structure embodying computer program code thereon for execution by a computer processor, wherein said computer program code comprises instructions for performing a method according to claim 1.

14. An electronic device comprising:

a voltage controlled oscillator, responsive to a VCO tuning voltage signal and to a calibration signal, configured to provide a VCO output signal, wherein a frequency of said VCO output signal is divided by an adjustable number determined by a divider control signal, thus generating a divided VCO output signal, said adjustable number being equal to or larger than one;

a reference frequency module, configured to provide a reference frequency signal comprising a stable reference frequency corresponding to said frequency divided by said adjustable number;

a phase detector module, responsive to said reference frequency signal, responsive to said said divided VCO output signal and responsive to a divider control signal, configured to provide a PD error signal, wherein a VCO tuning voltage signal is one of;

a) said PD error signal, and b) said PD error signal filtered by a low-pass filter; and

a calibration control module, responsive to said VCO tuning voltage signal, configured to provide said calibration signal and said divider control signal to said voltage controlled oscillator for implementing gain tuning of said VCO output signal of said voltage controlled oscillator according to said predetermined criterion.

15. The electronic device of claim 14, wherein the calibration control module is configured generate said VCO tuning voltage signal and said calibration signal by analyzing, according to said predetermined criterion, said VCO output signal and by analyzing, according to said predetermined criterion, at least one of:

a) said VCO output signal and

b) a selected number of previous VCO output signals provided to said calibration control module at pre-selected past time periods, wherein said pre-selected number is an integer of at least a value of one.

16. The electronic device of claim 15, wherein said analysis performed using said predetermined criterion comprises at least one of:

a) changing said frequency by iteration steps,

b) calculating said iteration steps, and

c) measuring, a gain of said voltage controlled oscillator VCO at said frequency changed by said iteration steps.

17. The electronic device of claim 14, further comprising:

a low-pass filter, responsive to said PD error signal, configured to provide said VCO tuning voltage signal by performing said low-pass filtering.

18. The electronic device of claim 14, further comprising:

a divider, responsive to said VCO output signal and to said divider control signal, configured to provide said divided VCO output signal and a clock signal indicative of said divided frequency is generated by said divider.

19. The electronic device of claim 18, wherein said VCO tuning voltage signal is an analog format, and said electronic communication device further comprises:

an ADC block, configured to convert said VCO tuning voltage signal to a digital format using said clock signal before said VCO tuning voltage signal is provided to said calibration control module.

20. The electronic device of claim 14, wherein said voltage controlled oscillator comprises at least one of:

a) a voltage controlled oscillator core, responsive to said VCO tuning voltage signal and said VCO tuning voltage signal is an analog signal; and

b) a VCO calibration block, responsive to said calibration signal and said calibration signal is a digital signal and said VCO calibration block is a digitally controlled capacitor.

21. The electronic device of claim 14, wherein said voltage controlled oscillator is configured to transmit or receive information in said electronic device.

22. The electronic device of claim 14, wherein said calibration control module is configured to be programmed through a user interface for entering said predetermined criterion.

23. The electronic device of claim 14, wherein said electronic device is a transmitter or a receiver, or both said transmitter and said receiver, or an electronic communication device, or a portable communication device, or a mobile electronic device or a mobile phone.

24. An integrated circuit comprising:

a voltage controlled oscillator, responsive to a VCO tuning voltage signal and to a calibration signal, configured to provide a VCO output signal, wherein a frequency of said VCO output signal is divided by an adjustable number determined by a divider control signal, thus generating a divided VCO output signal, said adjustable number being equal to or larger than one;

a reference frequency module, configured to provide a reference frequency signal comprising a stable reference frequency corresponding to a said frequency divided by said adjustable number;

a phase detector module, responsive to said reference frequency signal, responsive to said said divided VCO output signal and responsive to a divider control signal, configured to provide a PD error signal, wherein a VCO tuning voltage signal is one of;

a) said PD error signal, and b) said PD error signal filtered by a low-pass filter; and

a calibration control module, responsive to said VCO tuning voltage signal, configured to provide said calibration signal and said divider control signal to said voltage controlled oscillator for implementing gain tuning of said VCO output signal of said voltage controlled oscillator according to said predetermined criterion.

25. The integrated circuit of claim 24, wherein the calibration control module is configured generate said VCO tuning voltage signal and said calibration signal by analyzing, according to said predetermined criterion, said VCO output signal and by analyzing, according to said predetermined criterion, at least one of:

a) said VCO output signal and

b) a selected number of previous VCO output signals provided to said calibration control module at pre-selected past time periods, wherein said pre-selected number is an integer of at least a value of one.

26. The integrated circuit of claim 25, wherein said analysis performed using said predetermined criterion comprises at least one of:

a) changing said frequency by iteration steps,

b) calculating said iteration steps, and

c) measuring a gain of said voltage controlled oscillator VCO at said frequency changed by said iteration steps.

27. The integrated circuit of claim 24, further comprising:

a reference frequency module, configured to provide said reference frequency signal comprising said stable reference frequency corresponding to said frequency divided by said adjustable number.

28. An apparatus, comprising:

means for providing a VCO output signal, wherein a frequency of said VCO output signal is divided by an adjustable number determined by a divider control signal thus generating a divided VCO output signal, said adjustable number being equal to or larger than one;

means for providing a reference frequency signal comprising a stable reference frequency corresponding to said frequency divided by said adjustable number to said phase detector module;

means for generating a PD error signal in response to said divided VCO output signal, further in response to said reference frequency signal and in response to said divider control signal, wherein a VCO tuning voltage signal is one of;

a) said PD error signal, and b) said PD error signal filtered by a low-pass filter;

means for generating a calibration signal and said divider control signal in response to said VCO tuning voltage signal according to a predetermined criterion, and for providing said VCO tuning voltage signal and said calibration signal to said means for providing the VCO output signal for implementing gain tuning of said VCO output signal according to said predetermined criterion.

29. The apparatus of claim 28, wherein said apparatus is an electronic device configured for gain tuning in a phase locked loop.