Method of manufacturing a micro-electrical-mechanical system

• US 7,153,716 B2
• Filed: 02/25/2005
• Issued: 12/26/2006
• Est. Priority Date: 05/31/2004
• Status: Expired due to Fees

• Current Assignee: LAPIS Semiconductor Co., Ltd. (ROHM Co., Ltd.)
• Original Assignee: OKI Electric Industry Company Limited
• Inventors: Ikegami, Naokatsu
• Primary Examiner(s): Mulpuri, Savitri
• Application Number:
  US11/065,062
• Publication Number:
  US 20050266599A1
• Time in Patent Office: 669 Days
• Field of Search: 438 48- 53, 438106-127, 438/455, 438/465, 216/2
• US Class Current: 438/51
• CPC Class Codes: B81C 1/00896 Temporary protection during separation into individual elements

Abstract

Micro-electrical-mechanical systems are fabricated in a substrate having a sacrificial layer sandwiched between two semiconductor layers. The semiconductor layers are selectively etched to create non-etched frames and etched microstructures immobilized within the frames by the sacrificial layer. An adhesive sheet is attached to one surface of the substrate, and the substrate is diced into chips, each including one frame and one immobilized microstructure. The sacrificial layer is then selectively etched to free a movable member in each microstructure. Finally, the chips are detached from the adhesive sheet, each chip becoming a micro-electrical-mechanical system. This fabrication method provides a simple and inexpensive way to avoid damage to the microstructure during the dicing process.

Claims

1. A method of fabricating a micro-electrical-mechanical system (MEMS) device, the method comprising:

preparing a substrate having a first side, a second side, a first semiconductor layer on the first side, a second semiconductor layer on the second side, and a sacrificial layer sandwiched between the first and second semiconductor layers, the substrate including a plurality of chip areas, each chip area including a peripheral area and an interior area disposed within the peripheral area;

selectively etching the substrate from both the first side and the second side to remove part of the first semiconductor layer and part of the second semiconductor layer from the interior area of each chip area without removing the sacrificial layer, thereby leaving a frame in the peripheral area and forming, within each interior area, a microstructure having a movable member, the movable member being immobilized to the frame by the sacrificial layer;

preparing a sheet having an adhesive surface;

attaching the adhesive surface of the sheet to the remaining parts of the second side of the substrate;

dicing the substrate from the first side down at least to the adhesive surface of the sheet, thereby dividing the substrate into chips;

etching exposed parts of the sacrificial layer, thereby freeing the movable member from the frame, after the substrate has been diced into chips; and

detaching the chips from the sheet.

2. The method of claim 1, further comprising:

weakening adhesion between the sheet and the substrate before detaching the chips from the sheet.

3. The method of claim 2, wherein weakening the adhesion comprises exposing the sheet to ultraviolet light.

4. The method of claim 2, wherein weakening the adhesion comprises exposing the sheet to heat.

5. The method of claim 2, wherein weakening the adhesion is performed after etching the exposed parts of the sacrificial layer.

6. The method of claim 2, wherein weakening the adhesion is performed after dicing the substrate and before etching the exposed parts of the sacrificial layer.

7. The method of claim 1, wherein the first and second semiconductor layers are silicon layers.

8. The method of claim 7, wherein the sacrificial layer is a silicon oxide layer.

9. The method of claim 7, wherein etching exposed parts of the sacrificial layer comprises etching with acetic acid.

10. The method of claim 7, wherein etching exposed parts of the sacrificial layer comprises etching with ammonium fluoride.

11. The method of claim 7, wherein etching exposed parts of the sacrificial layer comprises etching with ammonium hydrogen fluoride.

12. The method of claim 7, wherein etching exposed parts of the sacrificial layer comprises etching with hydrogen fluoride.

13. The method of claim 7, wherein etching exposed parts of the sacrificial layer comprises a Bosh etching process.

14. The method of claim 1, wherein the microstructure also includes at least one beam attaching the movable member to the frame, the at least one beam being formed in the first semiconductor layer, the movable member being formed in the first semiconductor layer, the sacrificial layer, and the second semiconductor layer, the interior of each chip area thus including a first part in which the movable member is formed, a second part in which the at least one beam is formed, and a third part exterior to the first and second parts.

15. The method of claim 14, wherein the movable member and the at least one beam are formed as a unitary structure in each interior area.

16. The method of claim 14, wherein said selectively etching the substrate comprises:

etching the first semiconductor layer down to the sacrificial layer in the third part of the interior area of each chip area, without etching the sacrificial layer; and

etching the second semiconductor layer down to the sacrificial layer in the second and third parts of the interior area of each chip area, without etching the sacrificial layer.

17. The method of claim 15, wherein said selectively etching the substrate further comprises etching the second semiconductor layer partway down to the sacrificial layer in the first part of the interior area of each chip area, without etching the sacrificial layer.

18. The method of claim 1, wherein the substrate is a silicon-on-insulator substrate.