Isolation structures for preventing photons and carriers from reaching active areas and methods of formation

• US 7,154,136 B2
• Filed: 02/20/2004
• Issued: 12/26/2006
• Est. Priority Date: 02/20/2004
• Status: Active Grant

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Micron Technology, Inc.
• Inventors: Cole, Bryan G., Sorensen, Troy
• Primary Examiner(s): Soward, Ida M.
• Application Number:
  US10/781,707
• Publication Number:
  US 20050184291A1
• Time in Patent Office: 1,040 Days
• Field of Search: 257/69, 257/84, 257/88, 257/93, 257/204, 257/222, 257291-293, 257/446, 257/462, 257/83, 257/187, 257117-118, 257/290, 257/294
• US Class Current: 257/292
• CPC Class Codes: H01L 27/1463 Pixel isolation structures
• CPC Class Codes: H01L 31/103 the potential barrier being of the PN homojunction type

Abstract

Regions of an integrated circuit are isolated by a structure that includes at least one isolating trench on the periphery of an active area. The trench is deep, extending at least about 0.5 μm into the substrate. The isolating structure prevents photons and electrons originating in peripheral circuitry from reaching the active area. Where the substrate has a heavily-doped lower layer and an upper layer on it, the trench can extend through the upper layer to the lower layer. A thermal oxide can be grown on the trench walls. A liner can also be deposited on the sidewalls of each trench. A fill material having a high-extinction coefficient is then deposited over the liner. The liner can also be light absorbent so that both the liner and fill material block photons.

Claims

1. An integrated circuit comprising:

a substrate comprising a lower layer and an upper layer on the lower layer;

an array of pixel cells at a surface of the upper layer, each pixel cell comprising a photo-conversion device; and

a trench structure around at least a portion of the array, wherein the trench structure extends from the surface to the lower layer, and wherein the trench structure prevents at least a portion of photons or charged particles from passing through the trench structure to the array wherein said trench structure has a top width and a base layer width and the base layer width is smaller than the top width wherein the trench structure has sidewalls and contains a first material that prevents at least a portion of photons or charged particles from passing through the trench structure to the array.

2. The integrated circuit of claim 1, further comprising a thermal oxide on the sidewalls of the trench structure.

3. The integrated circuit of claim 1, wherein the first material is selected from the group consisting of doped polysilicon, undoped polysilicon and boron-doped carbon.

4. The integrated circuit of claim 1, wherein the trench structure has a depth of about 4 μ

m to about 6 μ

m.

5. The integrated circuit of claim 1, wherein the integrated circuit comprises one of a CMOS image sensor and a CCD image sensor.

6. The integrated circuit of claim 1, further comprising a liner formed along at least a portion of the sidewalls.

7. The integrated circuit of claim 6, wherein the liner is a high absorption material.

8. The integrated circuit of claim 1, further comprising a second material that partially fills the trench structure, wherein the second material prevents at least a portion of photons or charged particles from passing through the trench structure to the array.

9. The integrated circuit of claim 8, wherein the second material has a higher refractive index than that of the first material.

10. The integrated circuit of claim 8, further comprising a third material that partially fills the trench structure, wherein the third material prevents at least a portion of photons or charged particles from passing through the trench structure to the array.

11. The integrated circuit of claim 10, wherein the third material has a higher refractive index than that of the second material.

12. A structure for isolating an active area of an integrated circuit, the structure comprising:

a trench formed in a substrate of the integrated circuit along at least a portion of a periphery of the active area, the substrate having a lower layer and an upper layer on the lower layer, wherein the trench extends from a surface of the upper layer to a surface of the lower layer and the trench includes a top width and a base layer width where the base layer width is smaller than the top width;

an insulating liner formed along sidewalls of the trench; and

a first fill material formed over the insulating liner wherein the first fill material at least partially fills the trench and prevents at least a portion of photons and electrons from passing through the trench to the active area.

13. The structure of claim 12, wherein the insulating liner is a high absorption material.

14. The structure of claim 12, further comprising a thermal oxide material on the sidewalls of the trench.

15. The structure of claim 12, wherein the trench has a depth of about 4 μ

m to about 6 μ

m.

16. The structure of claim 12, wherein the semiconductor device comprises one of a CMOS image sensor, a CCD image sensor, a DRAM, a flash memory, an SRAM, a microprocessor, a DSP and an ASIC.

17. The structure of claim 12, wherein the first fill material is an attenuating material that absorbs photons.

18. The structure of claim 17, wherein the first fill material comprises one of doped polysilicon, undoped polysilicon and boron-doped carbon.

19. The structure of claim 12, further comprising a second fill material that partially fills the trench, wherein the second material prevents at least a portion of photons from passing through the trench.

20. The structure of claim 19, wherein the second fill material has a higher refractive index than that of the first material and is deposited over the surface of the first fill material.

21. The structure of claim 19, further comprising a third fill material that partially fills the trench, wherein the third fill material prevents at least a portion of photons from passing through the trench.

22. The structure of claim 21, wherein the third fill material has a higher refractive index than that of the second material and is deposited over the surface of the second fill material.

23. A structure for isolating an active area on an integrated circuit, the structure comprising:

a plurality of trenches formed in a substrate of the integrated circuit on at least a portion of a periphery of the active area, wherein a depth of each of the plurality of trenches extends to a surface of a base layer of said substrate and where at least one trench of the plurality of trenches includes a top width and a base layer width where the base layer width is smaller than the top width further comprising an insulating liner formed along each sidewall of the plurality of trenches wherein the insulating liner comprises a high absorption material.

24. The structure according to claim 23, wherein the insulating liner comprises a light attenuation film.

25. The structure according to claim 23, wherein the insulating liner comprises a nitride material or alpha carbon material.

26. The structure according to claim 23, wherein each of the trenches has a depth of about 4 μ

m to about 6 μ

m.

27. The processing system of claim 26, further comprising a second fill material that has a higher refractive index than that of the first material.

28. The structure according to claim 23, further comprising a first fill material that at least partially fills each of the plurality of trenches and prevents at least a portion of photons or charged particles from passing through the trench.

29. The structure according to claim 28, wherein the first fill material is a high absorption material.

30. The structure according to claim 28, wherein the first fill material is a high extinction coefficient material.

31. The structure according to claim 28, wherein the first fill material is one of doped polysilicon, undoped polysilicon and boron-doped carbon.

32. The structure according to claim 28, further comprising a second fill material that partially fills each of the plurality of trenches, wherein the second material prevents at least a portion of photons from passing through the trench.

33. The structure according to claim 32, wherein the second fill material has a higher refractive index than that of the first material.

34. The structure according to claim 32, further comprising a third fill material that partially fills each of the plurality of trenches, wherein the third fill material prevents at least a portion of photons from passing through the trench.

35. The structure according to claim 34, wherein the third fill material has a higher refractive index than that of the second material.

36. A processing system, the processing system comprising:

a processor;

an integrated circuit coupled to the processor, the integrated circuit comprising a structure for isolating an active area on the integrated circuit, the structure comprising;

a trench formed in a substrate on at least a portion of a periphery of the active area of the integrated circuit, wherein the trench extends to a surface of a base layer below the substrate, and wherein the trench has sidewalls and the trench includes a top width and a base layer width where the base layer width is smaller than the top width;

an insulating liner formed along the sidewalls; and

a first fill material formed over the insulating liner that at least partially fills the trench and prevents at least a portion of photons or electrons from passing through the trench.

37. The processing system of claim 36, wherein the insulating liner is a high absorption material or a thermal oxide material.

38. The processing system of claim 36, wherein the first fill material is selected from the group consisting of doped polysilicon, undoped polysilicon and boron-doped carbon.

39. The processing system of claim 36, wherein the trench has a depth of about 4 μ

m to about 6 μ

m.

40. The processing system of claim 36, wherein the integrated circuit comprises one of a CMOS image sensor, a CCD image sensor, a DRAM, a flash memory, an SRAM, a microprocessor, a DSP and an ASIC.

41. An isolation structure provided at a surface of a substrate between a source area in which at least one of photons and charged particles originate and an active region, the isolation structure comprising:

at least one trench extending from the surface of the substrate into the substrate to a depth of at least about 0.5 μ

m and with a length extending across the surface of the substrate between the source area and the active area and the at least one trench includes a top width and a base layer width where the base layer width is smaller than the top width.

42. An integrated circuit comprising:

a substrate;

an array of pixel cells at a surface of the substrate, each pixel cell comprising a photo-conversion device; and

at least one trench around at least a portion of the array, wherein the trench extends from the surface of the substrate to a depth of at least about 0.5 μ

m into the substrate and the at least one trench includes a top width and a base layer width where the base layer width is smaller than the top width wherein the at least one trench structure has sidewalls and contains a first material that prevents a portion of photons or charged particles from passing through the trench structure to the array.

43. A processing system, the processing system comprising:

a processor;

an integrated circuit coupled to the processor, the integrated circuit comprising a structure for isolating an active area on the integrated circuit, the structure comprising;

a trench extending from a surface of a substrate to a depth of at least about 0.5 μ

m into the substrate and the trench includes a top width and a base layer width where the base layer width is smaller than the top width.

44. An integrated circuit comprising:

a substrate comprising a lower layer and an upper layer on the lower layer;

an array of pixel cells at a surface of the upper layer, each pixel cell comprising a photo-conversion device; and

a trench structure around at least a portion of the array, wherein the trench structure;

extends from the surface to the lower layer,

prevents at least a portion of photons or charged particles from passing through the trench structure to the array;

has sidewalls and contains a first material that prevents at least a portion of photons or charged particles from passing through the trench structure to the array; and

contains a second material that partially fills the trench structure, wherein the second material prevents at least a portion of photons or charged particles from passing through the trench structure to the array.

45. The integrated circuit of claim 44, wherein the second material has a higher refractive index than that of the first material.

46. The integrated circuit of claim 44, further comprising a third material that partially fills the trench structure, wherein the third material prevents at least a portion of photons or charged particles from passing through the trench structure to the array.

47. The integrated circuit of claim 46, wherein the third material has a higher refractive index than that of the second material.

48. A structure for isolating an active area of an integrated circuit, the structure comprising:

a trench formed in a substrate of the integrated circuit along at least a portion of a periphery of the active area, the substrate having a lower layer and an upper layer on the lower layer, wherein the trench extends from a surface of the upper layer to a surface of the lower layer;

an insulating liner formed along sidewalls of the trench;

a first fill material formed over the insulating liner wherein the first fill material at least partially fills the trench and prevents at least a portion of photons and electrons from passing through the trench to the active area, and

a second fill material that partially fills the trench, wherein the second material prevents at least a portion of photons from passing through the trench.

49. The structure of claim 48, wherein the second fill material has a higher refractive index than that of the first material and is deposited over the surface of the first fill material.

50. The structure of claim 48, further comprising a third fill material that partially fills the trench, wherein the third fill material prevents at least a portion of photons from passing through the trench.

51. The structure of claim 50, wherein the third fill material has a higher refractive index than that of the second material and is deposited over the surface of the second fill material.

52. A structure for isolating an active area on an integrated circuit, the structure comprising:

a plurality of trenches formed in a substrate of the integrated circuit on at least a portion of a periphery of the active area, wherein a depth of each of the plurality of trenches extends to a surface of a base layer of said substrate and the plurality of trenches include a first fill material that at least partially fills each of the plurality of trenches and prevents at least a portion of photons or charged particles from passing through the trench wherein the first fill material is a high extinction coefficient material.

53. A structure for isolating an active area on an integrated circuit, the structure comprising:

a plurality of trenches formed in a substrate of the integrated circuit on at least a portion of a periphery of the active area, wherein a depth of each of the plurality of trenches extends to a surface of a base layer of said substrate and the plurality of trenches include;

a first fill material that at least partially fills each of the plurality of trenches and prevents at least a portion of photons or charged particles from passing through the trench; and

a second fill material that partially fills each of the plurality of trenches, wherein the second material prevents at least a portion of photons from passing through the trench.

54. The structure according to claim 53, wherein the second fill material has a higher refractive index than that of the first material.

55. The processing system of claim 53 wherein said second fill material has a higher refractive index than that of the first material.

56. The structure according to claim 53, further comprising a third fill material that partially fills each of the plurality of trenches, wherein the third fill material prevents at least a portion of photons from passing through the trench.

57. The structure according to claim 56, wherein the third fill material has a higher refractive index than that of the second material.