Gate stacks
First Claim
1. A method of forming a semiconductor structure, comprising the steps of:
- providing a semiconductor region;
forming a gate stack on top of the semiconductor region, the gate stack including(i) a gate dielectric region on top of the semiconductor region,(ii) a first gate polysilicon region on top of the gate dielectric region, and(iii) a second gate polysilicon region on top of the first gate polysilicon region, the second gate polysilicon region being doped with a type of dopants; and
forming on a side wall of the gate stack a diffusion barrier region and a spacer oxide region,wherein the diffusion barrier region is sandwiched between the gate stack and the spacer oxide region,wherein the diffusion barrier region is in direct physical contact with both the first and second gate polysilicon regions, andwherein the diffusion barrier region comprises a material having a property of preventing a diffusion of oxygen-containing materials through the diffusion barrier region.
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Accused Products
Abstract
A structure and fabrication method for a gate stack used to define source/drain regions in a semiconductor substrate. The method comprises (a) forming a gate dielectric layer on top of the substrate, (b) forming a gate polysilicon layer on top of the gate dielectric layer, (c) implanting n-type dopants in a top layer of the gate polysilicon layer, (d) etching away portions of the gate polysilicon layer and the gate dielectric layer so as to form a gate stack on the substrate, and (e) thermally oxidizing side walls of the gate stack with the presence of a nitrogen-carrying gas. As a result, a diffusion barrier layer is formed at the same depth in the polysilicon material of the gate stack regardless of the doping concentration. Therefore, the n-type doped region of the gate stack has the same width as that of the undoped region of the gate stack.
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Citations
16 Claims
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1. A method of forming a semiconductor structure, comprising the steps of:
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providing a semiconductor region; forming a gate stack on top of the semiconductor region, the gate stack including (i) a gate dielectric region on top of the semiconductor region, (ii) a first gate polysilicon region on top of the gate dielectric region, and (iii) a second gate polysilicon region on top of the first gate polysilicon region, the second gate polysilicon region being doped with a type of dopants; and forming on a side wall of the gate stack a diffusion barrier region and a spacer oxide region, wherein the diffusion barrier region is sandwiched between the gate stack and the spacer oxide region, wherein the diffusion barrier region is in direct physical contact with both the first and second gate polysilicon regions, and wherein the diffusion barrier region comprises a material having a property of preventing a diffusion of oxygen-containing materials through the diffusion barrier region. - View Dependent Claims (2, 3, 4, 5)
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6. A method of forming a semiconductor structure, comprising the steps of:
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providing a semiconductor region; forming a gate stack on top of the semiconductor region, the gate stack including (i) a gate dielectric region on top of the semiconductor region, (ii) a first gate polysilicon region on top of the gate dielectric region, and (iii) a second gate polysilicon region on top of the first gate polysilicon region, the second gate polysilicon region being doped with a type of dopants; and forming on a side wall of the gate stack a diffusion barrier region and a spacer oxide region, wherein the diffusion barrier region is sandwiched between the gate stack and the spacer oxide region, wherein the diffusion barrier region is in direct physical contact with both the first and second gate polysilicon regions, and wherein the step of forming the diffusion barrier region and the spacer oxide region comprises the step of thermally oxidizing the side wall of the gate stack with the presence of a nitrogen-carrying gas. - View Dependent Claims (7, 8)
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9. A method of forming a semiconductor structure, comprising the steps of:
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providing a semiconductor substrate; forming a gate stack on top of the semiconductor substrate, the gate stack including (i) a gate dielectric region on top of the semiconductor substrate, (ii) a first gate polysilicon region on top of the gate dielectric region, and (iii) a second gate polysilicon region on top of the first gate polysilicon region, the second gate polysilicon region being heavily doped with a type of dopants; and forming on first and second side walls of the gate stack first and second diffusion barrier regions and first and second spacer oxide regions, respectively, wherein the first diffusion barrier region is sandwiched between the gate stack and the first spacer oxide region, wherein the first diffusion barrier region is in direct physical contact with both the first and second gate polysilicon regions, wherein the second diffusion barrier region is sandwiched between the gate stack and the second spacer oxide region, wherein the second diffusion barrier region is in direct physical contact with both the first and second gate polysilicon regions, and wherein the first and second diffusion barrier regions comprise a material having a property of preventing a diffusion of oxygen-containing materials through the first and second diffusion barrier regions. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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Specification