Integrated circuit device

• US 7,157,742 B2
• Filed: 03/11/2003
• Issued: 01/02/2007
• Est. Priority Date: 02/06/1998
• Status: Expired due to Term

• Current Assignee: Invensas Corporation
• Original Assignee: Tessera Technologies Hungary Kft. (Adeia Inc.)
• Inventors: Badehi, Avner
• Primary Examiner(s): Graybill; David E.
• Application Number:
  US10/385,555
• Publication Number:
  US 20030151124A1
• Time in Patent Office: 1,393 Days
• Field of Search: 257/81, 257/98, 257/99, 257/225, 257/228, 257/294, 257/323, 257/432, 257/434, 257/447, 257/448, 257/460, 257/446, 257/680, 257/681
• US Class Current: 257/81
• CPC Class Codes: H01L 21/56 Encapsulations, e.g. encapsulation layers, coatings
• CPC Class Codes: H01L 21/82 to produce devices, e.g. integrated circuits, each consisting of a plurality of components
• CPC Class Codes: H01L 2221/68327 used during dicing or grinding
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/24051 Conformal with the semiconductor or solid-state device
• CPC Class Codes: H01L 2224/24225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
• CPC Class Codes: H01L 2224/94 at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/3114 the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 24/02 Bonding areas on insulating substrates, e.g. chip carriers, H01L23/49816, H01L23/49838, H01L23/5389; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/105 the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 27/14632 Wafer-level processed structures
• CPC Class Codes: H01L 27/14687 Wafer level processing
• CPC Class Codes: H01L 27/15 including semiconductor components having potential barriers, specially adapted for light emission
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01051 : Antimony [Sb]
• CPC Class Codes: H01L 2924/01057 : Lanthanum [La]
• CPC Class Codes: H01L 2924/01068 : Erbium [Er]
• CPC Class Codes: H01L 2924/01077 : Iridium [Ir]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 31/02002 : Arrangements for conducting electric current to or from the device in operations
• CPC Class Codes: H01L 31/0203 : Containers; Encapsulations , e.g. encapsulation of photodiodesfor photovoltaic devices H01L31/048; for organic photosensitive devices H10K30/80
• CPC Class Codes: H01L 31/02164 : for shielding light, e.g. light blocking layers, cold shields for infrared detectors
• CPC Class Codes: H01L 31/02327 : the optical elements being integrated or being directly associated to the device, e.g. back reflectors optical coatings H01L31/0216
• CPC Class Codes: H01L 31/125 : Composite devices with photosensitive elements and electroluminescent elements within one single body
• CPC Class Codes: H01L 31/186 : Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
• CPC Class Codes: H01L 33/0095 : Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/44 : characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/483 : Containers
• CPC Class Codes: H01L 33/486 : adapted for surface mounting
• CPC Class Codes: H01L 33/52 : Encapsulations
• CPC Class Codes: H01L 33/56 : Materials, e.g. epoxy or silicone resin
• CPC Class Codes: H01L 33/62 : Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

An integrally packaged optronic integrated circuit device (310) including an integrated circuit die (322) containing at least one of a radiation emitter and radiation receiver and having top and bottom surfaces formed of electrically insulative and mechanically protective material, at least one of the surfaces (317) being transparent to radiation, and electrically insulative edge surfaces (314) having pads.

Claims

1. A packaged optronic integrated circuit device including:

an integrated circuit die containing at least one of a radiation emitter and radiation receiver,

said integrated circuit die having formed thereon at least one mechanical protective layer, comprising top and bottom planar surfaces, formed of electrically insulative and mechanically protective material,

at least one of said at least one mechanical protective layer being transparent to radiation,

at least one of said at least one mechanical protective layer comprising electrically insulative edge surfaces having pads,

the pads comprising solderable contacts extending onto at least one of the top and bottom planar surfaces of the at least one mechanical protective layer, and

at least one of said planar surfaces of said at least one mechanical protective layer including an edge configuration defining a step.

2. A packaged optronic integrated circuit device according to claim 1 wherein said step is coated with an opaque coating.

3. A packaged optronic device according to claim 1 wherein said integrated circuit die has top and bottom surfaces and said step is disposed entirely above the top surface of the die.

4. A packaged optronic device according to claim 1 wherein said integrated circuit die has top and bottom faces, said at least one mechanical protective layer includes a top protective layer transparent to radiation overlying the top face of said integrated circuit die and a bottom protective layer overlying said bottom face of said integrated circuit die.

5. A packaged optronic device according to claim 4 wherein said top protective layer has a top planar surface and said top surface includes said edge configuration defining said step.

6. A packaged optronic device according to claim 5 wherein said bottom protective layer has a bottom planar surface and said solderable contacts extend onto said bottom planar surface.