Summing power amplifier

• US 7,157,965 B1
• Filed: 06/21/2004
• Issued: 01/02/2007
• Est. Priority Date: 06/21/2004
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Kim, Beomsup
• Primary Examiner(s): Pascal; Robert
• Assistant Examiner(s): NGUYEN, HIEU P
• Application Number:
  US10/873,742
• Time in Patent Office: 925 Days
• Field of Search: 330/124.R, 330/301, 330/295, 257/538, 257/380
• US Class Current: 330/124.00R
• CPC Class Codes: H03F 3/602 Combinations of several amplifiers

Abstract

A power amplifier comprises an amplification stage comprises a plurality of amplifiers, wherein each amplifier provides an amplified output, and an inductive summing device configured to receive the plurality of amplified outputs and provide a combined output signal. A method of amplifying a signal comprises applying the signal to an amplifier stage comprising a plurality of amplifiers, wherein each amplifier is configured to provide an amplified output, and providing a combined output signal via an inductive summing device configured to receive the plurality of amplified outputs.

Claims

1. A power amplifier comprising:

an amplification stage comprising a plurality of amplifiers, wherein each amplifier provides an amplified output; and

an inductive summing device configured to receive the plurality of amplified outputs and provide a combined output signal, wherein;

the inductive summing device comprises a plurality of inductive loops;

each inductive loop is coupled with a corresponding one of the plurality of amplifiers; and

the plurality of inductive loops are configured to be mutually inductive.

2. The power amplifier as recited in claim 1, wherein the power amplifier receives an input that is balanced, and the combined output signal is unbalanced.

3. A power amplifier as recited in claim 1, further comprising a pre-amplifier configured to amplify an input and send a preamp output to the amplification stage.

4. A power amplifier as recited in claim 1, wherein the plurality of amplifiers are configured in parallel.

5. A power amplifier as recited in claim 1, wherein the inductive summing device comprises a plurality of inductive loops;

and one of the inductive loops is coupled with a corresponding one of the plurality of amplifiers.

6. A power amplifier as recited in claim 1, wherein the inductive summing device comprises a plurality of inductive loops;

and one of the inductive loops provides the combined output signal.

7. A power amplifier as recited in claim 1, wherein the plurality of amplifiers are configured to have a layout that is approximately symmetrical.

8. A power amplifier as recited in claim 1, wherein the plurality of amplifiers are delay compensated.

9. A power amplifier as recited in claim 1, wherein the plurality of amplifiers are delay compensated to have approximately the same input phase.

10. A power amplifier as recited in claim 1, wherein the plurality of amplifiers are delay compensated to have approximately the same input phase;

and the length of input wires of the plurality of amplifiers are approximately equal.

11. A power amplifier as recited in claim 1, wherein the plurality of amplifiers are delay compensated to have approximately the same output phase.

12. A power amplifier as recited in claim 1, wherein the plurality of amplifiers are delay compensated to have approximately the same output phase;

and the length of output wires of the plurality of amplifiers are approximately equal.

13. A power amplifier as recited in claim 1, wherein one of the plurality of amplifiers includes a switch that allows said amplifier to be disconnected from the amplification stage.

14. A power amplifier as recited in claim 1, wherein the amplification stage and the inductive summing device are on the same integrated circuit (IC) chip.

15. A method of amplifying a signal, comprising:

applying the signal to an amplifier stage comprising a plurality of amplifier, wherein each amplifier is configured to provide an amplified output; and

providing a combined output signal via an inductive summing device configured to receive the plurality of amplified outputs, wherein;

the inductive summing device comprises a plurality of inductive loops;

each inductive loop is coupled with a corresponding one of the plurality of amplifiers; and

the plurality of inductive loops we configured to be mutually inductive.

16. The method of amplifying a signal as recited in claim 15, wherein the power amplifier receives m input that is balanced, and the combined output signal is unbalanced.

17. A method of amplifying a signal as recited in claim 15, further comprising pre-amplifying the signal via a preamp and sending the pre-amplified signal to the amplifier stage.

18. A method of amplifying a signal as recited in claim 15, wherein the plurality of amplifiers are configured in parallel.

19. A method of amplifying a signal as recited in claim 15, wherein the inductive summing device comprises a plurality of inductive loops;

and one of the inductive loops is coupled with a corresponding one of the plurality of amplifiers.

20. A method of amplifying a signal as recited in claim 15, wherein the inductive summing device comprises a plurality of inductive loops;

and one of the inductive loops provides the combined output signal.

21. A method of amplifying a signal as recited in claim 15, wherein the plurality of amplifiers are configured to have a layout that is approximately symmetrical.

22. A method of amplifying a signal as recited in claim 15, wherein the plurality of amplifiers are delay compensated.

23. A method of amplifying a signal as recited in claim 15, wherein the plurality of amplifiers are delay compensated to have approximately the same input phase.

24. A method of amplifying a signal as recited in claim 15, wherein the plurality of amplifiers are delay compensated to have approximately the same input phase;

and the length of input wires of the plurality of amplifiers are approximately equal.

25. A method of amplifying a signal as recited in claim 15, wherein the plurality of amplifiers are delay compensated to have approximately the same output phase.

26. A method of amplifying a signal as recited in claim 15, wherein the plurality of amplifiers are delay compensated to have approximately the same output phase;

and the length of output wires of the plurality of amplifiers are approximately equal.

27. A method of amplifying a signal as recited in claim 15, wherein one of the plurality of amplifiers includes a switch that allows said amplifier to be disconnected from the amplification stage.

28. A method of amplifying a signal as recited in claim 15, wherein the amplification stage and the inductive summing device are on the same integrated circuit (IC) chip.