Method and apparatus for pixel filtering using shared filter resource between overlay and texture mapping engines

• US 7,158,147 B2
• Filed: 09/04/2002
• Issued: 01/02/2007
• Est. Priority Date: 01/10/2000
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Piazza, Thomas A., Cook, Val G., Meinerth, Kim A., Watson, David W., Ghosh, Indraneel
• Primary Examiner(s): Nguyen; Kimbinh T.
• Application Number:
  US10/233,581
• Publication Number:
  US 20030001861A1
• Time in Patent Office: 1,581 Days
• Field of Search: 345/629, 345/606, 345/609, 345/610, 345/582, 345/641
• US Class Current: 345/609
• CPC Class Codes: G06T 15/005 General purpose rendering architectures
• CPC Class Codes: G09G 2340/125 wherein one of the images is motion video
• CPC Class Codes: G09G 5/363 Graphics controllers

Abstract

A configurable filter module for providing shared filter resource between an overlay engine and a texture mapping engine of a graphics system. The configurable filter may comprise a plurality of linear blend units each of which receives data input from one of the overlay engine and a mapping engine cache, and generates a linear blend filter output respectively; and a filter output multiplexer which receives data output from the linear blend units and selects a proper byte ordering output, wherein the linear blend units serve as an overlay interpolator filter to perform linear blending of the data input from the overlay engine during a linear blend mode, and serve as a texture bilinear filter to perform bilinear filtering of the data input from the mapping engine cache during a bilinear filtering mode.

Claims

1. A configurable filter module comprising:

a plurality of linear blend units each to receive data input from one of an overlay engine and a mapping engine cache and generate a linear blend filter output respectively, wherein the plurality of linear blending units comprise four dual linear blend units provided to support at least two data formats and a single linear blend unit provided to support only one data format and wherein the dual linear blend units are configured as either two split linear blend units or three split linear blend units and include associated circuitry to support both data formats under control; and

a filter output multiplexer to receive data output from the linear blend units and select a proper byte ordering output, wherein said linear blend units serve as an overlay interpolator filter to perform linear blending of the data input from the overlay engine during a linear blend mode and serve as a texture bilinear filter to perform bilinear filtering of the data input from the mapping engine cache during a bilinear filtering mode of a filter select signal.

2. The configurable filter module as claimed in claim 1, wherein the linear blending is accomplished on pixels using the equation A+α

(B−

A), where A represents 2-dimensional pixel data from the overlay engine indicating overlay surface A, B represents 2-dimensional data from the overlay engine indicating overlay surface B, and alpha (α

) represents a blending coefficient.

3. The configurable filter module as claimed in claim 1, wherein the bilinear filtering is accomplished on texels using the equation:

C=C1(1−

.u)(1−

.v)+C2(.u(1−

.v))+C3(.u*.v)+C4(1−

.u)*.v, where C1, C2,C3 and C4 represent 3-dimentional texel data from the mapping engine cache indicating four adjacent texels of locations U−

V, U+1−

V, U−

V+1 and U+1−

V+1, and where values .u and .v indicate fractional locations within the C1, C2, C3, C4 texels.

4. The configurable filter module as claimed in claim 1, wherein requests from the overlay engine for overlay interpolation take precedence over requests from the mapping engine cache.

5. The configurable filter module as claimed in claim 1, wherein the linear blend units can be configured as one of eight 8-bit linear interpolators, three 8-bit bi-linear interpolators and four 565 bi-linear interpolators to perform either said linear blending or said bilinear filtering of data input from respective overlay engine and mapping engine cache.

6. The configurable filter module as claimed in claim 1, wherein the linear blend units are configured as a combination of thrice-split linear blend units, a twice-split linear blend unit and a single linear blend unit for bilinear filtering data input from the mapping engine cache to approximate perspective correct shading value of a 3-dimensional triangular surface for different resolution formats.

7. The configurable filter module as claimed in claim 1, wherein the linear blend units are configured as four thrice-split linear blend units arranged in parallel for linear blending data input from the overlay engine to approximate perspective correct shading value of a 3-dimensional triangular surface for different resolution formats.

8. The configurable filter module as claimed in claim 1, wherein the linear blend units are configured as a combination of four dual linear blend units and a single linear blend unit arranged in parallel for bilinear filtering data input from the mapping engine cache to approximate perspective correct shading value of a 3-dimensional triangular surface for different resolution formats.

9. The configurable filter module as claimed in claim 1, wherein each of the linear blend units act as a single interpolator to calculate multiple color resolutions of different data format precision, and comprises:

a high order 5-bit calculation unit arranged to shift data input from left to right by three bit positions;

a high order 3-bit calculation unit arranged to shift data input from left to right by five bit positions;

first adders arranged to add outputs from the high order 5-bit and 3-bit calculation units to create a high order 8-bit precision calculation;

a low order 3-bit calculation unit arranged to shift data input from left to right by five bit positions;

a low order 5-bit calculation unit arranged to shift data input from left to right by three bit positions;

second adders arranged to add outputs from the low order 5-bit and 3-bit calculation units to create a low order 8-bit precision calculation; and

means for calculating multiple color resolutions of different data format precision based on the high order 8-bit precision calculation and the low order 8-bit precision calculation.

10. A method for providing shared filter functionality between first and second discrete engines in a graphics system to process video data comprising:

receiving video data from one of the first engine and the second engine;

configuring a plurality of linear blend units to perform linear blending of the video data received from the first engine or to perform bilinear filtering of the video data received from the second engine; and

determining filter color values to approximate perspective shading of a triangular surface of an image in different resolution formats.

11. The method as claimed in claim 10, wherein the first engine corresponds to an overlay engine, the second engine corresponds to a texture mapping engine, and the linear blending is accomplished on pixels using the equation A+alpha(B−

A), where A represents 2-dimensional pixel data from the overlay engine indicating overlay surface A, B represents 2-dimensional data from the overlay engine indicating overlay surface B, and alpha represents a blending coefficient.

12. The method as claimed in claim 11, wherein the bilinear filtering is accomplished on texels using the equation:

C=C1(1−

.u)(1−

.v)+C2(.u(1−

.v))+C3 (.u*.v)+C4(1−

.u)*.v, where C1, C2,C3 and C4 represent 3-dimentional texel data from said texture mapping engine indicating four adjacent texels of locations U−

V, U+1−

V, U−

V+1 and U+1−

V+1, and where values .u and .v indicate fractional locations within the C1, C2, C3, C4 texels.

13. The method as claimed in claim 11, wherein requests from the overlay engine for overlay interpolation take precedence over requests from the texture mapping engine.

14. A graphics controller comprising:

an engine to provide video data in two-dimension (2D);

a cache to store video data in three-dimension (3D); and

a configurable filter to provide shared filter resources and to perform linear blending of video data in 2D from the engine, or bilinear filtering of video data in 3D from the cache for a visual display.

15. The graphics controller as claimed in claim 14, wherein the engine is an overlay engine configured to perform 2D graphics functions and include a butter (BLT) engine and an arithmetic stretch butter (BLT) engine for performing fixed blitter and stretch butter (BLT) operations.

16. The graphics controller as claimed in claim 15, further comprising a 3D engine to provide video data in 3D for storage in the cache, perform 3D graphics functions, including creating a rasterized 2D display image from representation of 3D, perspective-correct texture mapping to deliver 3D graphics, bilinear and anisotropic filtering, MIP mapping to reduce blockiness and enhance image quality, Gouraud shading, alpha-blending, fogging and Z-buffering.

17. The graphics controller as claimed in claim 16, wherein the 3D engine further comprises:

a color space converter to receive YUV data and convert into RGB data, where YUV represents color-difference video data containing one luminance component (Y) and two chrominance components (U, V), and RGB represents composite video data containing red (R), green (G) and blue (B) components of an image;

an anisotropic filter to combine pixels from different levels-of detail (LOD) levels to produce an average of selected multiple LOD levels;

a dithering unit to read dither weights from a table and sum the dither weights with the current pixel data received from the anisotropic filter;

a re-ordering FIFO to sort pixels for the proper output format; and

a motion compensation unit to average successive pixels, sum an error term with the averaged result, and send data for final color calculations before rendering for said visual display.

18. The graphics controller as claimed in claim 14, wherein said configurable filter comprises:

a plurality of linear blend units to receive data input from one of the engine and the cache; and

a filter output multiplexer to receive data output from the linear blend units and select a proper byte ordering output,

wherein said linear blend units serve as an overlay interpolator filter to perform said linear blending of the video data received from the engine during a linear blend mode, and serve as a texture bilinear filter to perform said bilinear filtering of the video data received from the cache during a bilinear filtering mode.

19. The graphics controller as claimed in claim 18, wherein the plurality of linear blending units comprise four dual linear blend units provided to support at least two data formats, and a single linear blend unit provided to support only one data format.

20. The graphics controller as claimed in claim 18, wherein the dual linear blend units are configured as either two split linear blend units or three split linear blend units and include associated circuitry to support both data formats under control of a filter select signal.

21. The graphics controller as claimed in claim 18, wherein the linear blending is accomplished on pixels using the equation A+alpha(B−

A), where A represents 2-dimensional pixel data from the engine indicating overlay surface A, B represents 2-dimensional data from the engine indicating overlay surface B, and alpha represents a blending coefficient.

22. The graphics controller as claimed in claim 18, wherein the bilinear filtering is accomplished on texels using the equation:

C=C1(1−

.u)(1−

.v)+C2(. u(1−

.v)) +C3(.u*.v)+C4(1−

.u)*.v, where C1, C2, C3 and C4 represent 3-dimensional texel data from the cache indicating four adjacent texels of locations U−

V, U+1−

V, U−

V+1, and U+1−

V+1, and where values .u and .v indicate fractional locations within the C1, C2, C3, C4 texels.

23. The graphics controller as claimed in claim 18, wherein requests from the engine for overlay interpolation take precedence over requests from the cache.

24. The graphics controller as claimed in claim 18, wherein the linear blend units can be configured as one of eight 8-bit linear interpolators, three 8-bit bi-linear interpolators and four 565 bi-linear interpolators to perform either said linear blending or said bilinear filtering of video data received from the engine and the cache.

25. The graphics controller as claimed in claim 18, wherein the liner blend units are configured as a combination of three thrice-split linear blend units, a twice-split linear blend unit and a single linear blend unit for bilinear filtering data received from the cache to approximate perspective correct shading value of a 3-dimensional triangular surface for different resolution formats.

26. The graphics controller as claimed in claim 18, wherein the linear blend units are configured as four thrice-split liner blend units arranged in parallel for linear blending video data received from the engine to approximate perspective correct shading value of a 3-dimensional triangular surface for different resolution formats.

27. The graphics controller as claimed in claim 18, wherein the linear blend units are configured as a combination of four dual linear blend units and a single linear blend unit arranged in parallel for bilinear filtering video data received from the cache to approximate perspective correct shading value of a 3-dimensional triangular surface for different resolution formats.

28. The graphics controller as claimed in claim 18, wherein each of said linear blend units act as a single interpolator to calculate multiple color resolutions of different data format precision, and comprises:

a high order 5-bit calculation unit arranged to shift video data received from left to fight by three bit positions;

a high order 3-bit calculation unit arranged to shift data received from left to fight by five bit positions;

first adders arranged to add outputs from the high order 5-bit and 3-bit calculation units to create a high order 8-bit precision calculation;

a low order 3-bit calculation unit arranged to shift data input from left to right by five bit positions;

a low order 5-bit calculation unit arranged to shift data input from left to right by three bit positions;

second adders arranged to add outputs from the low order 5-bit and 3-bit calculation units to create a low order 8-bit precision calculation; and

means for calculating multiple color resolutions of different data format precision based on the high order 8-bit precision calculation and the low order 8-bit precision calculation.