Device for generating a digitally modulated test signal

• US 7,158,564 B1
• Filed: 08/28/2000
• Issued: 01/02/2007
• Est. Priority Date: 11/26/1999
• Status: Expired due to Term

• Current Assignee: Rohde & Schwarz GmbH & Company KG
• Original Assignee: Rohde & Schwarz GmbH & Company KG
• Inventors: Kernchen, Wolfgang, Braunstorfinger, Thomas
• Primary Examiner(s): Ghayour; Mohammed
• Assistant Examiner(s): Ettehadieh; Asian
• Application Number:
  US10/148,061
• Time in Patent Office: 2,318 Days
• Field of Search: 375/224, 375/295, 375/308, 375/316, 375/329, 332/108, 332/119, 332/103, 332/151
• US Class Current: 375/224
• CPC Class Codes: H04L 1/244 test sequence generators

Abstract

The aim of the invention is to generate a digitally modulated test signal, which is generated in the form of a multitude of transmission channels from a digital modulation data stream according to a predetermined digital modulation standard, and which is fed as I and Q values to an I/Q modulator. To this end: a) a portion of the transmission channels is generated, in a modulation coder, directly from an internal or external modulation data stream according to the predetermined modulation standard; b) the I and Q values for at least one portion of the remaining channels are fed as a pre-calculated modulation data sequence of alimited length from a memory to the modulation coder, and; the I and Q values generated according to a) and b) are added and fed to the I/Q modulator.

Claims

1. A method for generating a digitally modulated test signal comprising:

generating a first group of transmission channels comprising I and Q values, in a modulation coder, directly from a modulation data stream according to a predetermined standard;

generating a second group of transmission channels comprising I and Q values by repeating a pre-calculated data sequence of limited length, said pre-calculated data sequence being recalled from a memory of a modulation coder;

adding said I and Q values of said first group and said second group; and

feeding the result to an I/Q modulator to generate said test signal.

2. The method of claim 1 wherein said adding of said first group and said second group takes places synchronously with a clock signal and with the correct temporal correlation between the I and Q values.

3. The method of claim 2 wherein the I and Q values of the first group are buffer-stored in a memory having a different storage length from a memory that receives the I and Q values of the second group.

4. The method of claim 3 wherein the I and Q values of the first group are generated in real time directly for said modulation data stream.

5. The method of claim 4 wherein said modulation data stream is an internal modulation data stream.

6. The method of claim 4 wherein said modulation data stream is an external modulation data stream.

7. The method of claim 1 wherein the I and Q values of the first group are buffer-stored in a memory having a different storage length from a memory that receives the I and Q values of the second group.

8. The method of claim 7 wherein the I and Q values of the first group are generated in real time directly for said modulation data stream.

9. The method of claim 8 wherein said modulation data stream is an internal modulation data stream.

10. The method of claim 8 wherein said modulation data stream is an external modulation data stream.

11. The method of claim 1 wherein the I and Q values of the first group are generated in real time directly for said modulation data stream.

12. The method of claim 11 wherein said modulation data stream is an internal modulation data stream.

13. The method of claim 11 wherein said modulation data stream is an external modulation data stream.

14. The method of claim 1 wherein said modulation data stream is an internal modulation data stream.

15. The method of claim 1 wherein said modulation data stream is an external modulation data stream.