Streaming vector processor with reconfigurable interconnection switch
First Claim
1. A re-configurable, streaming vector processor comprising:
- a plurality of function units, each comprising one of a shifter, an adder;
a logic unit and a multiplier and having one or more inputs for receivinga data value and an output for storing a data value;
a re-configurable interconnection switch comprising a plurality of links, each link comprising an input switch operable to select between the outputs of at least two of the plurality of function units and an output switch operable to select between the inputs of at least two of the plurality of function units and each link operable to form a datapath between an output of a function unit and an input of the one or more inputs of a function unit; and
a micro-sequencer coupled to the re-configurable interconnection switch and operable to control the re-configurable interconnection switch,wherein the micro-sequencer is operable to produce one or more control words that cause a data value stored at the output of a function unit to traverse, in a single cycle of a processor clock, the datapath formed by a link of the plurality of links.
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Accused Products
Abstract
A re-configurable, streaming vector processor (100) is provided which includes a number of function units (102), each having one or more inputs for receiving data values and an output for providing a data value, a re-configurable interconnection switch (104) and a micro-sequencer (118). The re-configurable interconnection switch (104) includes one or more links, each link operable to couple an output of a function unit (102) to an input of a function unit (102) as directed by the micro-sequencer (118). The vector processor may also include one or more input-stream units (122) for retrieving data from memory. Each input-stream unit is directed by a host processor and has a defined interface (116) to the host processor. The vector processor also includes one or more output-stream units (124) for writing data to memory or to the host processor. The defined interface of the input-stream and output-stream units forms a first part of the programming model. The instructions stored in a memory, in the sequence that direct the re-configurable interconnection switch, form a second part of the programming model.
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Citations
20 Claims
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1. A re-configurable, streaming vector processor comprising:
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a plurality of function units, each comprising one of a shifter, an adder; a logic unit and a multiplier and having one or more inputs for receiving a data value and an output for storing a data value; a re-configurable interconnection switch comprising a plurality of links, each link comprising an input switch operable to select between the outputs of at least two of the plurality of function units and an output switch operable to select between the inputs of at least two of the plurality of function units and each link operable to form a datapath between an output of a function unit and an input of the one or more inputs of a function unit; and a micro-sequencer coupled to the re-configurable interconnection switch and operable to control the re-configurable interconnection switch, wherein the micro-sequencer is operable to produce one or more control words that cause a data value stored at the output of a function unit to traverse, in a single cycle of a processor clock, the datapath formed by a link of the plurality of links. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A method for operating a streaming vector processor comprising an interconnection switch having a plurality of links, a micro-sequencer and a plurality of function units each having an output and one or more inputs, the method comprising:
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storing a program of instructions in the micro-sequencer; in a single instruction cycle of the streaming vector processor; retrieving an instruction of the program of instructions; configuring the interconnection switch in accordance with the instruction retrieved from the program of instructions to provide a datapath between the output of a first function unit of the plurality of function units and an input of the one or more inputs of a second function unit of the plurality of function units; moving a first data value stored at the output the first function unit to the input of the second function unit along the datapath; the second function unit operating on the first data value to produce a second data value; and storing the second data value at the output of the second function unit, wherein configuring the interconnection switch in accordance with the instruction retrieved from the program of instructions comprises; configuring an input switch of a link of the plurality of links to select the output of the first function unit; and configuring an output switch of the link to select an input of the second function unit. - View Dependent Claims (17, 18, 19, 20)
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Specification