Feedback control of a chemical mechanical polishing device providing manipulation of removal rate profiles

• US 7,160,739 B2
• Filed: 08/31/2001
• Issued: 01/09/2007
• Est. Priority Date: 06/19/2001
• Status: Expired due to Term

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Schwarm, Alexander T., Shanmugasundram, Arulkumar P., Prabhu, Gopalakrishna B.
• Primary Examiner(s): Mills; Gregory
• Assistant Examiner(s): UMEZ ERONINI, LYNETTE T
• Application Number:
  US09/943,955
• Publication Number:
  US 20020197745A1
• Time in Patent Office: 1,957 Days
• Field of Search: 438/14, 438/692
• US Class Current: 438/14
• CPC Class Codes: B24B 37/013 Devices or means for detecting lapping completion
• CPC Class Codes: B24B 37/042 operating processes therefor
• CPC Class Codes: B24B 49/03 according to the final size of the previously ground workpiece
• CPC Class Codes: B24B 49/04 involving measurement of the workpiece at the place of grinding during grinding operation
• CPC Class Codes: B24B 49/18 taking regard of the presence of dressing tools
• CPC Class Codes: G05B 19/00 Programme-control systems
• CPC Class Codes: G05B 19/19 characterised by positioning or contouring control systems, e.g. to control position from one programmed point to another or to control movement along a programmed continuous path
• CPC Class Codes: G05B 19/41865 characterised by job scheduling, process planning, material flow
• CPC Class Codes: G05B 2219/32053 Adjust work parameter as function of other cell
• CPC Class Codes: G05B 2219/32065 Synchronise set points of processes
• CPC Class Codes: G05B 2219/45031 Manufacturing semiconductor wafers
• CPC Class Codes: H01L 21/31053 involving a dielectric removal step
• CPC Class Codes: H01L 21/67253 Process monitoring, e.g. flow or thickness monitoring
• CPC Class Codes: H01L 21/67276 Production flow monitoring, e.g. for increasing throughput program-control systems per se G05B19/00, e.g. total factory control G05B19/418
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y02P 90/02 Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

A method of controlling surface non-uniformity of a wafer in a polishing operation includes (a) providing a model for a wafer polishing that defines a plurality of regions on a wafer and identifies a wafer material removal rate in a polishing step of a polishing process for each of the regions, wherein the polishing process comprises a plurality of polishing steps, (b) polishing a wafer using a first polishing recipe based upon an incoming wafer thickness profile, (c) determining a wafer thickness profile for the post-polished wafer of step (b), and (d)calculating an updated polishing recipe based upon the wafer thickness profile of step (c) and the model of step (a) to maintain a target wafer thickness profile. The model can information about the tool state to improve the model quality. The method can be used to provide feedback to a plurality of platen stations.

Claims

1. A method of producing a target wafer thickness profile in a polishing operation, comprising:

(a) providing a model for wafer polishing that defines a plurality of substantially annular regions on a wafer and identifies a wafer material removal rate in a polishing step for each of the regions, wherein the model is based on measurements of one or more wafers that have completed the polishing step; and

(b) polishing a wafer using a polishing recipe based on the model that generates a target thickness profile for each region.

6. The method of claim 1 or 5, wherein the model comprises four or more regions.

7. The method of claim 1 or 2, wherein the polishing of step (b) comprises polishing the wafer at a plurality of polishing stations.

8. The method of claim 7, wherein the polishing step is carried out at three polishing stations.

9. The method of claim 7, wherein the polishing recipe at at least two polishing stations is the same.

10. The method of claim 7, wherein the polishing recipe at at least two polishing stations is different.

11. The method of claim 7, wherein calculating the updated polishing model comprises calculating updated polishing models for each of the plurality of polishing stations.

12. The method of claim 11, wherein the updated polishing recipes for each of the plurality of polishing stations accounts for the tool state of the individual polishing stations.

13. The method of claim 9 or 10, wherein the polishing of step (b) is carried out at a plurality of polishing stations, and wherein a wafer thickness profile for each of the subsequent polishing stations is determined in step (c) and is used to update the model in step (d).

14. The method of claim 1 or 2, wherein the step of providing a model comprises:

(a) measuring pre-polished wafer thickness in each of a plurality of regions defined on one or more wafers;

(b) polishing the one or more wafers, wherein polishing comprises polishing the one or more wafers in a plurality of polishing steps;

(c) measuring the wafer material removal rate for the one or more wafers at each of the plurality of regions after each of the polishing steps of step (f);

(d) providing a model defining the effect of tool state on polishing effectiveness; and

(e) recording the pre-polished and post-polished wafer thicknesses for each or the regions on a recordable medium.

15. The method of claim 14, further comprising:

fitting the data to a linear or non-linear curve that establishes a relationship between the material removal rate of a region of the wafer and a polishing parameter of interest.

16. The method of claim 15, wherein the polishing parameter comprises polishing time.

17. The method of claim 16, wherein the polishing parameters further comprise a parameter selected from the group consisting of polishing time, polishing pad down forces and velocity, slurry flow and composition, conditioning time, conditioning disk down forces and velocity, oscillating speeds of both the conditioning disk and the wafer carrier.

18. The method of claim 1 or 2, wherein the wafer removal for a region j (AR′

_j) in the model of step (a) is determined according to the equation;

AR′

_j=(c_11j·

x₁+c_12j)·

t₁+(c_21j·

x₂+c_22j)·

t₂+(c_31j·

x₃+c_32j)·

t₃+(c_41j·

x₁+c_42j)·

t₄+(c_51j·

x₅+c_52j)·

t₅,

where x₁, x₂, x₃, x₄, and x₅ are the additional parameter values for polishing steps 1, 2, 3, 4, and 5, respectively;

t₁, t₂, t₃, t₄, and t₅ are the polishing times for polishing steps 1, 2, 3, 4, and 5, respectively, and c_a1j provides the contribution to wafer removal of the variable x in polishing step a in region j; and

c_a2j provides the contribution to wafer removal of polishing time in polishing step a.

19. The method of claim 18 wherein the wafer material removal rate profile accounts for tool state by scaling the profile using the scaling factor:

(1+k_p·

t_p+k_d·

t_d+k_pd·

t_p·

t_d),

where the terms t_p and t_d refer to pad and disk life, respectively, with units of hour; and

the terms k_p, k_d and k_pd are empirically determined coefficients relating pad and disk life to removal rate.

2. A method of controlling surface non-uniformity of a wafer in a polishing operation, comprising:

(a) providing a model for wafer polishing that defines a plurality of regions on a wafer and a plurality of polishing steps and identifies a wafer material removal rate in a polishing step of a polishing process for each of the regions;

(b) polishing a wafer using a first polishing recipe;

(c) determining a wafer thickness profile for the polished wafer of step (b); and

(d) calculating an updated polishing model based upon the wafer thickness profile of step (c) and the model of step (a) and updating the first polishing recipe based on the updated mode to maintain a target wafer thickness profile.

3. The method of claim 2, wherein the first polishing recipe is based on the model of step (a) and an initial wafer thickness profile.

4. The method of claim 2, wherein the model of step (a) further defines the effect of the tool state on polishing effectiveness.

5. The method of claim 2, wherein the plurality of regions in the model of step (a) comprises regions extending radially outward from a center point on the wafer.

20. The method of claim 2, wherein the updated polishing model is attained by solving the equation:

$\underset{x}{\min }<br><br><br><br>f<br><br>\left(y^{\mathrm{sp}},g<br><br>\left(x\right)\right)$

where x is a vector of times and other processing parameters corresponding to the polishing recipe;

g(x) is the model for the polishing process, y^sp is a vector of the desired average region wafer thicknesses; and

f(y^sp, g(x)) is a penalty function to penalize the deviation between the model predictions g(x) and the desired thicknesses y^sp.

21. A method of determining a model for wafer thickness profile, comprising:

(a) measuring pre-polished wafer thickness in each of a plurality of regions defined on one or more wafers;

(b) polishing the one or more wafers, wherein polishing comprises polishing the one or more wafers in a plurality of polishing steps;

(c) measuring the wafer material removal rate for the one or more wafers at each of the plurality of regions after each of the polishing steps of step (b);

(d) providing a model defining the effect of tool state on polishing effectiveness; and

(e) recording the pre-polished and post-polished wafer thicknesses for each of the regions on a recordable medium.

22. The method of claim 21, further comprising:

fitting the data to a linear or non-linear curve that establishes a relationship between the material removal rate of a region of the wafer and a polishing parameter of interest.

23. The method of claim 22, wherein the polishing parameter comprises polishing time.

24. The method of claim 23, wherein the polishing parameters further comprise a parameter selected from the group consisting of polishing time, polishing pad down forces and velocity, slurry flow and composition, conditioning time, conditioning disk down forces and velocity, oscillating speeds of both the conditioning disk and the wafer carrier.

25. The method of claim 21 wherein the wafer material removal for a region j (AR′

_j) in the model of step (a) is determined according to the equation;

AR′

_j=(c_11j·

x₁+c_12j)·

t₁+(c_21j·

x₂+c_22j)·

t₂+(c_31j·

x₃+c_32j)·

t₃+(c_41j·

x₁+c_42j)·

t₄+(c_51j·

x₅+c_52j)·

t₅,

where x₁, x₂, x₃, x₄, and x₅ are the additional parameter values for polishing steps 1, 2, 3, 4, and 5, respectively;

t₁, t₂, t₃, t₄, and t₅ are the polishing times for polishing steps 1, 2, 3, 4, and 5, respectively, and c_a1j provides the contribution to wafer removal of the variable x in polishing step a in region j; and

c_a2j provides the contribution to wafer removal of polishing time in polishing step a.

26. The method of claim 21 wherein the wafer material removal rate profile accounts for tool state by scaling the profile using the scaling factor:

(1+k_p·

t_p+k_d·

t_d+k_pd·

t_p·

t_d),

where the terms t_p and t_d refer to pad and disk life, respectively, with units of hour; and

the terms k_p, k_d and k_pd are empirically determined coefficients relating pad and disk life to removal rate.

27. The method of claim 22, wherein the model is determined using less than 10 wafers.

28. A method of producing a target wafer thickness profile in a polishing operation, comprising:

(a) providing a model for wafer polishing that defines a plurality of substantially annular regions on a wafer, identifies a wafer material removal rate in a polishing step for each of the regions, and defines the effect of tool state on polishing effectiveness; and

(b) polishing a wafer using a polishing recipe based on the model that generates a target thickness profile for each region.