Apparatus and method for a data storage device with a plurality of randomly located data

• US 7,162,607 B2
• Filed: 08/31/2001
• Issued: 01/09/2007
• Est. Priority Date: 08/31/2001
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Yeung, Minerva M., Kozintsev, Igor V., Debes, Eric, Macy, William W.
• Primary Examiner(s): PEIKARI, BEHZAD
• Application Number:
  US09/945,422
• Publication Number:
  US 20030046559A1
• Time in Patent Office: 1,957 Days
• Field of Search: None
• US Class Current: 711/206
• CPC Class Codes: G06F 12/1408 by using cryptography for digital transmission H04L9/00
• CPC Class Codes: G06F 9/30025 Format conversion instructions, e.g. Floating-Point to Integer, decimal conversion
• CPC Class Codes: G06F 9/30032 Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
• CPC Class Codes: G06F 9/30036 Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
• CPC Class Codes: G06F 9/30043 LOAD or STORE instructions; Clear instruction
• CPC Class Codes: G06F 9/30109 having multiple operands in a single register
• CPC Class Codes: G06F 9/3013 according to data content, e.g. floating-point registers, address registers
• CPC Class Codes: G06F 9/345 of multiple operands or results addressing multiple banks G06F12/06

Abstract

An apparatus and method for loading a data storage device with a plurality of randomly located data are described. The method includes loading, in response to execution of a multiple data load instruction, data within a destination data storage device wherein one or more data elements from the data are randomly located within a memory device. In one embodiment, addresses of the data elements are contained within a data storage device and indicated as index addresses. In addition, the data elements are stored n one or more data storage areas of a memory device, which include look-up tables, data arrays or the like. In addition, data elements within the destination data storage device, as well as address indexes within the address data storage device may be organized in response to execution of a data shuffle instruction according to a data processing operation instruction.

Claims

1. A method comprising:

receiving a multiple-data load instruction;

executing the multiple-data load instruction; and

loading, in response to execution of the multiple-data load instruction, data within a destination data storage device, wherein one or more data elements from the data are randomly located within a source memory device.

2. The method of claim 1, wherein loading data further comprises:

receiving a source value indicating the memory device wherein the data is located;

receiving a device value indicating an address storage device containing addresses of the data elements;

reading, from the memory device, a data element for each address within the address storage device;

receiving a destination value indicating the destination data storage device wherein to load the data elements; and

storing each data element read from the memory device into the destination data storage device.

3. The method of claim 2, wherein reading the data element further comprises:

receiving a table value indicating a look-up table within the memory device wherein the data elements are initially stored;

receiving an offset value indicating a data region within a respective look-up table wherein the data elements are initially stored;

selecting an address index from the address data storage device;

reading a data element from the data region of the look-up table according to the selected address index; and

repeating the selecting and reading from each address index within the address data storage device.

4. The method of claim 2, wherein reading a data element further comprises:

receiving a memory access data type value indicating a data type of the data;

receiving a base address value indicating a start location of a data storage area within the memory device wherein the data elements are initially stored;

receiving an offset value indicating a data region within the data storage area wherein the data elements are initially stored;

selecting an address index from the address data storage device;

when a multiply value is received, setting the selected address index equal to the selected address index multiplied by the multiply value according to the data type of the data;

reading a data element from the data region of the data storage area according to the selected address index; and

repeating the selecting and reading from each address index within the address data storage device.

5. The method of claim 4, further comprising:

receiving an address index data type, indicating a data type of the address indexes within the address storage device as one of a byte data type, a word data type and a double word data type.

6. The method of claim 4, wherein the memory access data type is one of a byte data type, a word data type and a double word data type.

7. The method of claim 2, wherein receiving a destination value further comprises:

receiving, for one or more data elements, an address location within the destination data storage device wherein to store a respective data element.

8. The method of claim 1, wherein addresses of the data elements are stored within an address data storage device, and prior to loading the data, the method further comprises:

organizing, in response to executing a data shuffle instruction, address elements within the address data storage device according to a data processing operation.

9. The method of claim 1, further comprising:

organizing, in response to executing a data shuffle instruction, data elements within the destination data storage device according to a data processing operation.

10. The method of claim 1, further comprising:

processing, in response to executing a data processing instruction, data elements within the destination data storage device according to the data processing instruction.

11. A machine readable storage medium including program instructions that direct a system to function in a specified manner when executed by a processor, the program instructions comprising:

loading, in response to execution of a multiple-data load instruction, data from at least one data storage area of a memory device to a destination data storage device, wherein one or more data elements from the data are randomly located within the memory device.

12. The machine readable storage medium of claim 11, wherein loading data further comprises:

receiving a source value indicating the memory device wherein the data is located;

receiving a device value indicating an address data storage device containing addresses of the data elements;

reading, from the memory device, a data element for each address within the address storage device;

receiving a destination value indicating the destination data storage device wherein to load the data elements; and

storing each data element read from the memory device into the destination data storage device.

13. The machine readable storage medium of claim 12, wherein reading a data element further comprises:

receiving a table value indicating a look-up table within the memory device wherein the data elements are initially stored;

receiving an offset value indicating a data region within a respective look-up table wherein the data elements are initially stored;

selecting an address index from the address data storage device;

reading a data element from the data region of the look-up table according to the selected address index; and

repeating the selecting and reading from each address index within the address data storage device.

14. The machine readable storage medium of claim 12, wherein reading a data element further comprises:

receiving a memory access data type value indicating a data type of the data;

receiving a base address value indicating a start location of a data storage area within the memory device wherein the data elements are initially stored;

receiving an offset value indicating a data region within a respective data storage area wherein the data elements are initially stored;

selecting an address index from the address storage device;

when a multiply value is received, setting the selected address index equal to the selected address index multiplied by the multiply value according to the data type of the data;

reading a data element from the data region of the data storage area according to the selected address index; and

repeating the selecting and reading from each address index within the address data storage device.

15. The machine readable storage medium of claim 14, further comprising:

receiving an address index data type, indicating a data type of the address indexes within the address storage device as one of a byte data type, a word data type and a double word data type.

16. The machine readable storage medium of claim 14, wherein the memory access data type is one of a byte data type, a word data type and a double word data type.

17. The machine readable storage medium of claim 12, wherein receiving a destination value further comprises:

receiving, for one or more data elements, an address location within the destination data storage device wherein to store a respective data element.

18. The machine readable storage medium of claim 11, wherein addresses of the one or more data elements are stored within an address data storage device, and prior to loading the data, the method further comprises:

organizing, in response to executing a data shuffle instruction, address elements within the address data storage device according to a data processing operation.

19. The machine readable storage medium of claim 11, further comprising:

organizing, in response to executing a data shuffle instruction, data elements within the destination data storage device according to a data processing operation.

20. The machine readable storage medium of claim 11, further comprising:

processing, in response to executing a data processing instruction, data element within the destination data storage device according to the data processing instruction.

21. An apparatus, comprising:

a processor having an execution unit to execute instructions;

a memory device including one or more data storage areas to contain data generated during apparatus initialization;

a register file coupled to the processor, including an address data storage device including address indexes of data elements within a respective data storage area within the memory device; and

the execution unit to load, in response to execution of a multiple-data load instruction, data from the one or more data storage areas of the memory device to a destination data storage device, wherein one or more data elements from the data are randomly stored within the memory device.

22. The apparatus of claim 21, further comprising:

a storage device coupled to the processor, having sequences of instructions stored therein, which when executed by the execution unit cause the processor to;

generate data elements according to a data generation instruction; and

store the data elements within the one or more data storage areas of the memory device.

23. The apparatus of claim 21, wherein the multiple data load instruction further causes the execution unit to:

select a data storage area within the memory device based on a received data storage area value;

calculate a location of a respective data element within the selected data storage area;

read the respective data element from the calculated location; and

store the respective data element within the destination data storage device.

24. The apparatus of claim 23, wherein the instruction to store the respective data further causes the execution unit to:

store the respective data element at a received address location within the destination data storage device.

25. The apparatus of claim 23, wherein the instruction to calculate the location of the respective data element further causes the execution unit to:

receive a device value indicating an address storage device containing the addresses of the data elements;

receive a table value indicating a look-up table within the memory device wherein the data elements are initially stored; and

receive an offset value indicating a data region within a respective look-up table, wherein the data elements are initially stored such that the location of the respective data element is calculated as an address index of the respective data element within the look-up table.

26. The apparatus of claim 23, wherein instruction to calculate the location of the respective data element further causes the execution unit to:

receive a memory access data type value indicating a data type of the data;

receive a base address value indicating a start location of a data storage area within the memory device wherein the data elements are initially stored;

receive a device value indicating an address storage device containing the addresses of the data elements including a multiply value indicating a value which is multiplied to address indexes within the address data storage device according to the memory access data type of the data;

receive an offset value indicating a data region within a respective data storage area, wherein the data elements are initially stored such that the location of the respective data element is calculated as an address index of the respective data element within the data region.

27. The apparatus of claim 21, further comprising:

a data shuffle unit coupled between the register file and the execution unit, the data shuffle unit to organize, in response to execution of an address shuffle instruction, address elements within the address data storage device according to a data processing operation and to organize, in response to executing a data shuffle instruction, data elements within the destination data storage device according to a data processing operation.

28. A system comprising:

a processor having an execution unit to execute instructions;

a memory device including one or more data storage areas to store data generated during application initialization;

a register file coupled to the execution unit, including an address data storage device including address indices of data elements within a respective data storage area of the memory device;

a data shuffle unit coupled between the register file and the execution unit, the data shuffle unit to organize, in response to execution of an address shuffle instruction, address elements within the address data storage device according to a data processing operation and to organize, in response to executing a data shuffle instruction, data elements within the destination data storage device according to a data processing operation; and

the execution unit to load, in response to execution of a multiple data load instruction, data from at least one data storage area of the memory device to the destination data storage device, wherein one or more data elements from the data are randomly stored within the memory device.