Composite multiplexer circuit and chip component, high-frequency module and radio communication apparatus using the same

• US 7,164,306 B2
• Filed: 10/14/2004
• Issued: 01/16/2007
• Est. Priority Date: 10/16/2003
• Status: Expired due to Fees

• Current Assignee: Kyocera Corporation
• Original Assignee: Kyocera Corporation
• Inventors: Makino, Yutaka
• Primary Examiner(s): Callahan; Timothy P.
• Assistant Examiner(s): COX, CASSANDRA F
• Application Number:
  US10/965,277
• Publication Number:
  US 20050281210A1
• Time in Patent Office: 824 Days
• Field of Search: None
• US Class Current: 327/407
• CPC Class Codes: H03H 7/463 Duplexers
• CPC Class Codes: H03H 9/0576 including surface acoustic wave [SAW] devices
• CPC Class Codes: H03H 9/72 Networks using surface acoustic waves
• CPC Class Codes: H03H 9/725 Duplexers
• CPC Class Codes: H04B 1/0057 using diplexing or multiplexing filters for selecting the desired band
• CPC Class Codes: H04B 1/18 Input circuits, e.g. for coupling to an antenna or a transmission line coupling networks between antennas or lines and receivers independent of the nature of the receiver H03H

Abstract

In a composite multiplexer circuit designed to multiplex plural frequency bands by interconnecting plural multiplexer circuits in parallel, a multiplexer circuit for extracting a frequency band of a GPS reception system includes a matching network including an inductor and a capacitor, and a surface acoustic wave filter connected in series with the matching network. The multiplexer circuit for the GPS reception system can be so set as to have infinite impedances at the other frequency bands than the frequency band thereof. This prevents signals in the other frequency bands from leaking into the multiplexer circuit for the GPS reception system.

Claims

1. A composite multiplexer circuit for multiplexing a plurality of frequency bands, comprising

a plurality of multiplexer circuits connected in parallel

at least one of multiplexer circuits for extracting one frequency band having a matching network including an inductor and a capacitor, and a surface acoustic wave filter connected in series with the matching network, wherein

in an individual frequency band of the plurality of frequency bands, a total sum of real parts of admittances normalized by a characteristic admittance, as view from a junction point connected with an antenna terminal to all the multiplexer circuits, is 1 whereas the total sum of imaginary parts of the admittances is 0.

2. A composite multiplexer circuit according to claim 1, wherein the plural frequency bands include a first frequency band, and a second frequency band higher than the fist frequency band, and

wherein the multiplexer circuits include a first multiplexer circuit for extracting the first frequency band, and a second multiplexer circuit for extracting the second frequency band, and

respective admittance in the first frequency band and the second frequency band in the first multiplexer circuit are express as:

Y1a=G1a+jB1a,

Y2a=G2a+jB2a,

whereas respective admittance in the first frequency band and the second frequency band in the second multiplexer circuit are expressed as;

Y1b=G1b+jB1b,

Y2b=G2b+jB2b,

(where “

j”

represents an imaginary unit, “

1” and

“

2”

represent frequency bands, “

Y”

represents admittance, “

G”

represents real part, and “

B”

represents imaginary part),

and wherein the composite multiplexer circuits are designed to satisfy the following expressions;

Gna+Gnb=1

Bna+Bnb=0(n1,

     2).

3. A composite multiplexer circuit according to claim 2, wherein the first multiplexer circuit is a circuit including a low pass filter, and

wherein the second multiplexer circuit comprises the matching network and the surface acoustic wave filter.

4. A composite multiplexer circuit according to claim 3, wherein the first multiplexer circuit comprises the matching network and the surface acoustic wave filter, whereas the second multiplexer circuit is a circuit including a high pass filter.

5. A composite multiplexer circuit according to claim 1, wherein the plural frequency bands include a first frequency band, a second frequency band higher than the first frequency band, and a third frequency band higher than the second frequency band, and

wherein the multiplexer circuits include a first multiplexer circuit for extracting the first frequency band, a second multiplexer circuit for extracting the second frequency band, and a third multiplexer circuit for extracting the third frequency band, and

respective admittance in the first frequency band, the second frequency band, and the third frequency band in the first multiplexer circuit are express as:

Y1a=G1a+jB1a,

Y2a=G2a+jB2a,

Y3a=G3a+jB2a,

respective admittance in the first frequency band, the second frequency band, and the third frequency band in the second multiplexer circuit are expressed as;

Y1b=G1b+jB1b,

Y2b=G2b+jB2b,

Y3b=G3a+jB3b, and

respective admittance in the first frequency band, the second frequency band, and the third frequency band in the third multiplexer circuit are expressed as;

Y1c=G1c+jB1c,

Y2c=G2c+jB2c,

Y3c=G3c+jB3c,

(where “

j”

represents an imaginary unit. “

1,”

“

2,” and

“

3”

represent frequency bands,“

Y”

represents admittance.“

G”

represents real part, and“

B”

represents imaginary part).

and wherein the composite multiplexer circuits are designed to satisfy the following expressions;

Gna+Gnb+Gnc=1

Bna+Bnb+Bnc=0(n=1, 2,3).

6. A composite multiplexer circuit according to claim 5, wherein the second multiplexer circuit comprises the matching network and the surface acoustic wave filter.

7. A composite multiplexer circuit according to claim 6, wherein the first multiplexer circuit is a circuit including a low pass filter, whereas the third multiplexer circuit is a circuit including a high pass filter.

8. A composite multiplexer circuit according to claim 1, wherein the matching network comprises a series capacitor, a parallel capacitor, a series inductor and a parallel capacitor, which are arranged from an input side in the order named.

9. A composite multiplexer circuit according to claim 8, wherein the series inductor of the matching network has an Inductance L of 15 nH or less, and a Q of 15 or more as determined at 800MHz.

10. A composite multiplexer circuit according to claim 1, wherein the SAW filter is of a Balance output type or of an Unbalance output type.

11. A chip component comprising a dielectric multilayered substrate mounting thereon the individual multiplexer circuits included in the composite multiplexer circuit according to claim 1.

12. A high-frequency module comprising the composite multiplexer circuit according to claim 1 mounted on a surface of and/or internally of a dielectric multilayered substrate, and mounting thereon either one or both of a duplexer and a power amplifier.

13. A radio communication apparatus comprising the high-frequency module according to claim 12.

14. A composite multiplexer circuit for multiplexing a plurality of frequency bands, comprising:

a plurality of multiplexer circuit connected in parallel,

wherein at least one of the multiplexer circuits for extracting one frequency band having a high pass filter including an inductor and a capacitor, and a band elimination filter, wherein

in an individual frequency band of the plurality of frequency bands, a total sum of real parts of admittances normalized by a characteristic admittance, as view from a junction point connected with an antenna terminal to all the multiplexer circuits, is 1 whereas the total sum of imaginary parts of the admittances is 0.

15. A composite multiplexer circuit according to claim 14, wherein the plural frequency bands include a first frequency band, a second frequency band higher than the first frequency band, and a third frequency band higher than the second frequency band, and

wherein the multiplexer circuits include a first multiplexer circuit for extracting the first frequency band, a second multiplexer circuit for extracting the second frequency band, and a third multiplexer circuit for extracting the third frequency band,

respective admittance in the first frequency band, the second frequency band, and the third frequency band in the first multiplexer circuit are express as:

Y1d=G1d+jB1d,

Y2d=G2d+jB2d,

Y3d=G3d+jB2d,

respective admittance in the first frequency band, the second frequency band, and the third frequency band in the second multiplexer circuit are expressed as;

Y1e=G1e+jB1e,

Y2e=G2e+jB2e,

Y3e=G3e+jB3e, and

respective admittance in the first frequency band, the second frequency band, and the third frequency in the third multiplexer circuit are expressed as;

Y1f=G1f+jB1f,

Y2f=G2f+jB2f,

Y3f=G3f+jB3f,

(where“

j”

represents an imaginary unit,“

1,”

“

2,” and

“

3”

represent frequency bands, “

Y”

represents admittance, “

G”

represents real part, and “

B”

represents imaginary part).

and wherein the composite multiplexer circuits are designed to satisfy the following expressions;

Gnd+Gne+Gnf=1

Bnd+Bne+Bnf=0(n=1, 2,3).

16. A composite multiplexer circuit according to claim 15, wherein the first multiplexer circuit comprises at least one low pass filter;

the second multiplexer circuit comprises a high pass filter and a band elimination filter; and

the third multiplexer circuit comprises a high pass filter.