Dynamically adaptable semiconductor parametric testing
First Claim
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1. A method of parametric testing of semiconductor wafers, comprising:
- loading a wafer on a chuck;
aligning the wafer on the chuck;
calibrating a probe head to a location on the wafer;
reading a test plan for parametric testing of the wafer, the test plan including a first prober-movement map and a second prober-movement map;
probing the wafer based on the first prober-movement map of the test plan, interrupting the probing of the wafer in response to an error threshold being exceeded;
selecting the second prober-movement map; and
probing the wafer based on the second prober-movement map.
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Abstract
An apparatus, method, system, and signal-bearing medium may provide multiple maps, which may include multiple probing sequences to be called upon at run-time based on statistical thresholds or other selected criteria. Each map may include a series of locations on a wafer, the tests to perform at each location, and the measured results of each test. A parametric test system may perform the test at the associated location on the wafer. If the statistical threshold is exceeded or the selected criteria is met, the current map may be abandoned in favor of a different map.
92 Citations
19 Claims
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1. A method of parametric testing of semiconductor wafers, comprising:
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loading a wafer on a chuck; aligning the wafer on the chuck; calibrating a probe head to a location on the wafer; reading a test plan for parametric testing of the wafer, the test plan including a first prober-movement map and a second prober-movement map; probing the wafer based on the first prober-movement map of the test plan, interrupting the probing of the wafer in response to an error threshold being exceeded; selecting the second prober-movement map; and probing the wafer based on the second prober-movement map. - View Dependent Claims (2, 3, 4, 5)
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6. An apparatus for parametric testing of semiconductor wafers, comprising:
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a prober including test pins and a wafer chuck; a wafer loader to load a wafer on the wafer chuck; an auto-alignment system to align the wafer on the wafer chuck; and a test station adapted to; read a test plan for parametric testing of the wafer, the test plan including a first prober-movement map and a second prober-movement map; command to prober to probe the wafer based on the first prober-movement map; command to prober to interrupt the probing of the wafer in response to an error threshold being exceeded; select the second prober-movement map; and command to prober to probe the wafer based on the second prober-movement map. - View Dependent Claims (7, 8)
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9. A method of parametric testing of semiconductor wafers, comprising:
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loading a wafer on a chuck; aligning the wafer on the chuck; calibrating a probe head to a location on the wafer; reading a test plan for parametric testing of the wafer, the test plan including a plurality of prober-movement maps; probing the wafer based on one of the plurality of prober-movement maps, interrupting the probing of the wafer in response to an error threshold being exceeded; selecting a different prober-movement map from the plurality of prober-movement maps; and probing the wafer based on the selected different prober-movement map. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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Specification