Test circuit for digital to analog converter in liquid crystal display driver

• US 7,167,117 B2
• Filed: 08/04/2005
• Issued: 01/23/2007
• Est. Priority Date: 08/05/2004
• Status: Active Grant

• Current Assignee: Magnachip Semiconductor Limited (Magnachip Semiconductor)
• Original Assignee: Magnachip Semiconductor
• Inventors: Choe, Seong-Min
• Primary Examiner(s): Nguyen; Linh V.
• Application Number:
  US11/198,597
• Publication Number:
  US 20060055572A1
• Time in Patent Office: 537 Days
• Field of Search: 341/118, 341/120, 341/144, 341/145, 341/155, 341/110, 345/89, 345/100, 345/103, 345/212, 345/590, 345/87, 345/83
• US Class Current: 341/120
• CPC Class Codes: H03M 1/1071 Measuring or testing
• CPC Class Codes: H03M 1/66 Digital/analogue converters H03M1/001 – H03M1/10 take precedence

Abstract

A test device for testing a digital to analog converter includes a gamma reference unit for generating a plurality of analog signals different from each other; a temporary storing unit for generating a plurality of digital signals different from each other; a decoder for selecting one of the plurality of analog signals or one of the plurality of digital signals in response to a digital code signal; and a switching unit for controlling a connection between the decoder and the gamma reference unit and between the decoder and the temporary storing unit according to an operation mode.

Claims

1. A test device for testing a digital to analog converter, comprising:

a gamma reference unit for generating a plurality of analog signals different from each other;

a temporary storing unit for generating a plurality of digital signals different from each other;

a decoder for selecting one of the plurality of analog signals or one of the plurality of digital signals in response to a digital code signal; and

a switching unit for controlling a connection between the decoder and the gamma reference unit and between the decoder and the temporary storing unit according to an operation mode.

2. The test device as recited in claim 1, wherein, at a normal mode, the decoder is connected to the gamma reference unit and is disconnected-from the temporary storing unit and, at a test mode, the decoder is disconnected from the gamma reference unit and is connected to the temporary storing unit.

3. The test device as recited in claim 2, wherein it is determined whether the digital to analog converter is defective by measuring a voltage level of an output of an analog amplifier, wherein the analog amplifier receives an output of the decoder.

4. The test device as recited in claim 1, wherein the temporary storing unit is a shift register.

5. The test device as recited in claim 1, wherein the temporary storing unit is a register.

6. The test device as recited in claim 1, wherein the temporary storing unit is a latch.

7. The test device as recited in claim 1, wherein the temporary storing unit is a static random access memory (SRAM).

8. The test device as recited in claim 1, wherein the gamma reference unit includes a series of resistors.