Memory apparatus

• US 7,167,943 B2
• Filed: 10/05/2001
• Issued: 01/23/2007
• Est. Priority Date: 10/06/2000
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Tashiro, Jun
• Primary Examiner(s): Padmanabhan; Mano
• Assistant Examiner(s): Chery; Mardochee
• Application Number:
  US10/149,142
• Publication Number:
  US 20030084258A1
• Time in Patent Office: 1,936 Days
• Field of Search: 711/103, 711/163
• US Class Current: 711/103
• CPC Class Codes: G06F 12/1441 for a range
• CPC Class Codes: G06F 21/79 in semiconductor storage media, e.g. directly-addressable memories
• CPC Class Codes: G06Q 20/341 Active cards, i.e. cards including their own processing means, e.g. including an IC or chip
• CPC Class Codes: G06Q 20/3576 Multiple memory zones on card
• CPC Class Codes: G07F 7/1008 Active credit-cards provided with means to personalise their use, e.g. with PIN-introduction/comparison system

Abstract

When a read request has been received, it is determined whether there is a read address that has been designated in a particular area. When a read address has been designated in the particular area, the process is terminated. In other words, the process is completed although data is not read. When a read address has not been designated in the particular area, data is read from the designated address of the memory. The data that has been read is supplied to a host device. After the data has been read, a read address stored in, for example, a register is written to the particular area. The address from which data has been read is appended to the particular area. In such a manner, data that has been read from the host device is prohibited from being accessed.

Claims

1. A memory apparatus attachable to and detachable from a host device, the memory apparatus comprising:

an irreversibly writeable memory; and

a control circuit that controls operations of writing to and reading from the irreversibly writeable memory;

a data area of the irreversibly writeable memory including a plurality of one-time writeable data units for storing data, the data being written to the irreversibly writeable memory by some of the plurality of one-time writeable data units being changed from an initial state and by remaining ones of the plurality of one-time writeable data units remaining in the initial state;

the control circuit, in response to receiving a read request, (i) reads all of the data from the data area of the irreversibly writeable memory and then (ii) changes all of the remaining ones of the plurality of one-time writeable data units of the data area from their initial state so that the data cannot be further read.

4. A memory apparatus as set forth in claim 1, 2, or 3,

wherein the irreversibly writeable memory is a nonvolatile semiconductor memory that can be attached to and detached from the host device.

8. A memory apparatus as set forth in claim 1, wherein the data written to the irreversibly writeable memory is selected from the group consisting of a password, an encryption key, and a decryption key.

2. A memory apparatus attachable to and detachable from a host device, the memory apparatus comprising:

an irreversibly writeable memory;

a control circuit that controls operations of writing to and reading from the irreversibly writeable memory;

a data area disposed in the irreversibly writeable memory and including a plurality of one-time writeable data units for storing data, the data being written to the irreversibly writeable memory by some of the plurality of one-time writeable data units being changed from an initial state and by remaining ones of the plurality of one-time writeable data units remaining in the initial state; and

a further data area operable to store reproduction restriction information, the further data area being disposed in the irreversibly writeable memory or in an irreversibly writeable memory region of the control circuit;

the control circuit, in response to receiving a request to read the data written to the data area of the irreversibly writeable memory when the reading operation is restricted by the reproduction restriction information, (i) is prohibited from carrying out the reading operation so that the data is not read from the data area of the irreversibly writeable memory and then (ii) changes the remaining ones of the plurality of one-time writeable data units of the data area from their initial state.

9. A memory apparatus as set forth in claim 2, wherein the data area includes a plurality of one-time writeable data units for storing the reproduction restriction information.

10. A memory apparatus as set forth in claim 9, wherein the plurality of one-time writeable data units of the data area are in their initial state when the reading operation is not restricted.

11. A memory apparatus as set forth in claim 9, wherein when the reading operation is not restricted by the reproduction restriction information, the data written to the irreversibly writeable memory is read and an address of the data is written to the data area to prevent further reading of the data.

12. A memory apparatus as set forth in claim 2, wherein the reproduction restriction information includes an address of the data written to the irreversibly writeable memory when the reading operation is restricted by the reproduction restriction information.

13. A memory apparatus as set forth in claim 2, wherein the reproduction restriction information includes a time interval during which the data written to the irreversibly writeable memory may be reproduced.

3. A memory apparatus attachable to and detachable from a host device, the memory device comprising:

an irreversibly writeable memory;

a control circuit that controls operations of writing to and reading from the irreversibly writeable memory;

a data area disposed in the irreversibly writeable memory and including a plurality of one-time writeable data units for storing data, the data being written to the irreversibly writeable memory by some of the plurality of one-time writeable data units being changed from an initial state and by remaining ones of the further plurality of one-time writeable data units remaining in the initial state; and

at least one further data area disposed in the irreversibly writeable memory or in an irreversibly writeable memory region of the control circuit, the further data area including a counter area having a further plurality of one-time writeable data units for storing a reading operation count value that represents the number of times that the data has been read from the data area of the irreversibly writeable memory, the number of one-time writeable data units in the counter area representing a maximum number of times that the data may be read;

the control circuit, in response to receiving a request to read the data from the data area of the irreversibly writeable memory, (i) reads all of the data from the data area of the irreversibly writeable memory, (ii) changes one of the one-time writeable data units in the counter area from the initial state whereby the reading operation count value is changed, and if all of the one-time writeable data units in the counter area are thereby changed from their initial state, the control circuit (iii) is prohibited from further reading of the data so that the data is not read from the data area of the irreversibly writeable memory and then (iv) changes the remaining ones of the plurality of one-time writeable data units of the data area from their initial state.

14. A memory apparatus as set forth in claim 3, wherein the maximum number of times that the associated data may be reproduced corresponds to a maximum monetary value or to a maximum point value.

5. A method for controlling a memory apparatus attachable to and detachable from a host device, the memory apparatus including an irreversibly writeable memory and a control circuit that controls operations of writing to and reading from the irreversibly writeable memory, the irreversibly writeable memory including a data area that includes a plurality of one-time writeable data units for storing data, the data area including previously written data represented by some of the plurality of one-time writeable data units being changed from an initial state and by remaining ones of the plurality of one-time writeable data units remaining in the initial state;

the method comprising;

receiving a read request; and

in response to receiving the read request,

(i) reading all of the previously written data from the data area of the irreversibly writeable memory, and

(ii) then changing all of the remaining ones of the plurality of one-time writeable data units of the data area of the irreversibly writeable memory from their initial state so that the previously written data cannot be further read.

15. A method as set forth in claim 5, wherein the previously written data is selected from the group consisting of a password, an encryption key, and a decryption key.

6. A method for controlling a memory apparatus attachable to and detachable from a host device, the memory apparatus including an irreversibly writeable memory and a control circuit that controls operations of writing to and reading from the irreversibly writeable memory, the irreversibly writeable memory including a data area that includes a plurality of one-time writeable data units for storing data, the data area including previously written data represented by some of the plurality of one-time writeable data units being changed from an initial state and by remaining ones of the plurality of one-time writeable data units remaining in the initial state;

the method comprising;

providing a further data area for storing reproduction restriction information, the further data area being disposed in the irreversibly writeable memory or in an irreversibly writeable memory region of the control circuit;

receiving a read request; and

in response to receiving the read request,

(i) determining whether the reading operation is restricted by the reproduction restriction information, and

if the reading operation is not restricted by the reproduction restriction information, (ii) reading the previously written data from the data area of the irreversibly writeable memory, else

if the reading operation is restricted by the reproduction restriction information, (ii) prohibiting reading of the previously written data from the data area of the irreversibly writeable memory and (iii) then changing the remaining ones of the plurality of one-time writeable data units of the data area from their initial state.

16. A method as set forth in claim 6, wherein the further data area includes a further plurality of one-time writeable data units for storing the reproduction restriction information.

17. A method as set forth in claim 16, wherein the further plurality of one-time writeable data units of the further data area are in their initial state when the reading operation is not restricted.

18. A method as set forth in claim 16, further comprising, in response to receiving the read request, (iii) writing an address of the previously written data in the further data area if the reading operation is presently not restricted by the reproduction restriction information to prevent further reading of the previously written data.

19. A method as set forth in claim 6, wherein the reproduction restriction information includes an address of the previously written data when the reading operation is restricted by the reproduction restriction information.

20. A method as set forth in claim 6, wherein the reproduction restriction information includes a time interval during which the previously written data may be reproduced.

7. A method for controlling a memory apparatus attachable to and detachable from a host device, the memory apparatus including an irreversibly writeable memory and a control circuit that controls operations of writing to and reading from the irreversibly writeable memory, the irreversibly writeable memory including a data area that includes a plurality of one-time writeable data units for storing data, the data area including previously written data represented by some of the plurality of one-time writeable data units being changed from an initial state and by remaining ones of the plurality of one-time writeable data units remaining in the initial state;

the method comprising;

providing at least one further data area that includes a counter area for storing a reading operation count value that represents the number of times that the data has been read from the data area of the irreversibly writeable memory, the at least one further data area being disposed in the irreversibly writeable memory or in an irreversibly writeable memory region of the control circuit, the counter area including a further plurality of one-time writeable data units wherein the number of one-time writeable data units in the counter area represents a maximum number of times that the associated data may be read;

receiving a read request; and

in response to receiving the read request,

(i) reading all of the data from the data area of the irreversibly writeable memory,

(ii) changing one of the one-time writeable data units in the counter area from the initial state so that the reading operation count value is changed, and

if all of the one-time writeable data units in the counter area are thereby changed from their initial state, (iii) prohibiting further reading of the data from the data area of the irreversibly writeable memory and then (iv) changing the remaining ones of the plurality of one-time writeable data units of the data area from their initial state.

21. A method as set forth in claim 7, wherein the maximum number of times that the associated data may be reproduced corresponds to a maximum monetary value or to a maximum point value.