Data modem

• US 7,167,945 B2
• Filed: 12/14/2004
• Issued: 01/23/2007
• Est. Priority Date: 12/15/2000
• Status: Expired due to Fees

• Current Assignee: Elbit Systems of America LLC (Elbit Systems Limited)
• Original Assignee: Innovative Concepts, Inc. (Elbit Systems Limited)
• Inventors: Smith, Gregory N., Smith, Troy, Woodward, Robert A., Weinberger, Barry P., Wexler, Michael M., Feldstein, Andy A., Long, Shawn M.
• Primary Examiner(s): Myers; Paul R.
• Application Number:
  US11/010,476
• Publication Number:
  US 20060271719A1
• Time in Patent Office: 770 Days
• Field of Search: 365/51, 365/201, 711/103
• US Class Current: 711/103
• CPC Class Codes: H04M 11/066 Telephone sets adapted for data transmision

Abstract

An improved data modem (IDM) and method includes a communication processor module, a mass storage module, a power converter module, and one or more DSP modules. The communication processor module utilizes commercial off-the-shelf components as well as electrically programmable logic devices (EPLD), which are programmed to provide a watchdog timer, programmable interrupt controller, flash page addressing, ISA bus decoder and controller, and various circuits and logic.

Claims

1. A method for programming non-volatile memories in an x86-based data modem having a JTAG port using a in-circuit emulator, comprising the steps of:

resetting a communication system so as to place all components into a known state;

utilizing the emulator to seize control of a main processor of the communication system via the JTAG port;

configuring a first chipset and a second chipset, wherein a configured first chipset provides access to system dynamic random access memory, and a configured second chipset provides a PCI-to-ISA/IDE bridge function;

configuring the system synchronous dynamic random access memory;

load a first binary image and a first non-volatile memory burning program into the system dynamic random access memory by way of the first chipset;

programming the first non-volatile memory with the first binary image by executing the first memory burning program to effect the transfer of the first binary image from the system dynamic random access memory to the non-volatile memory through the second chipset.

2. The method of claim 1, further comprises the steps of:

loading a second binary image a second non-volatile memory burning program into the system dynamic random access memory by way of the first chipset;

programming the second non-volatile memory with the second binary image by executing the first memory burning program to effect the transfer of the second binary image from the system dynamic random access memory to the non-volatile memory through a local area network controller.

3. The method of claim 2, further comprising the steps of:

setting a breakpoint and an instruction pointer in the system dynamic random access memory to thereby pointing the instruction pointer to a first instruction location in the system dynamic random access memory and to provide a breakpoint where the non-volatile memory burning program terminates, wherein the first binary image is a BIOS.

4. The method a claim 1, wherein the step of programming the first non-volatile memory with the first binary image comprises programming a BIOS onto the first non-volatile memory.

5. The method a claim 2, wherein the step of programming the second non-volatile memory with the second binary image comprises programming the second non-volatile memory with Ethernet MAC IP address.