Multi-processor type storage control apparatus for performing access control through selector
First Claim
Patent Images
1. A storage system comprising:
- a plurality of storage units; and
a control apparatus coupled to the plurality of storage units or a central processing unit,wherein the control apparatus includes;
a plurality of processor sections coupled to the plurality of storage units or the central processing unit,a plurality of selectors which are coupled to the plurality of processor sections and each of which has a plurality of buffers, anda plurality of memories coupled to the plurality of selectors,wherein each of the plurality of memories has a first region for storing data to be stored in the plurality of storage units and a second region for storing control information for controlling the storage system,wherein each of the plurality of selectors, when receiving an access request for accessing to the second region from one of the plurality of processor sections, stores the data once into a corresponding one of the plurality of buffers thereof and sends the data thus stored to the one of the plurality of processor sections, andwherein the plurality of buffers of each of the plurality of selectors are provided in one to one correspondence with the plurality of memories.
0 Assignments
0 Petitions
Accused Products
Abstract
A storage control apparatus is coupled to a central processing unit (CPU) and a storage unit to control input/output of data between the CPU and the storage unit. The storage control apparatus has at least two processors coupled to the CPU and the storage unit, a cashe memory (CM) unit for temporarily storing data of the storage unit, a shared memory (SM) unit for storing information concerning control of the CM unit and the storage unit, and a selector coupled to the at least two processors, the CM unit and the SM unit through access paths to selectively apply access requests from the at least two processors to the CM unit and the SM unit.
-
Citations
8 Claims
-
1. A storage system comprising:
-
a plurality of storage units; and a control apparatus coupled to the plurality of storage units or a central processing unit, wherein the control apparatus includes; a plurality of processor sections coupled to the plurality of storage units or the central processing unit, a plurality of selectors which are coupled to the plurality of processor sections and each of which has a plurality of buffers, and a plurality of memories coupled to the plurality of selectors, wherein each of the plurality of memories has a first region for storing data to be stored in the plurality of storage units and a second region for storing control information for controlling the storage system, wherein each of the plurality of selectors, when receiving an access request for accessing to the second region from one of the plurality of processor sections, stores the data once into a corresponding one of the plurality of buffers thereof and sends the data thus stored to the one of the plurality of processor sections, and wherein the plurality of buffers of each of the plurality of selectors are provided in one to one correspondence with the plurality of memories. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. A storage system comprising:
-
a plurality of storage units; and a control apparatus coupled to the plurality of storage units or a central processing unit, wherein the control apparatus includes; a plurality of processor sections coupled to the plurality of storage units or the central processing unit, a first selector which is coupled to the plurality of processor sections; a second selector which is coupled to the plurality of processor sections and has a plurality of buffers, and a plurality of memories coupled to the plurality of selectors, wherein each of the plurality of memories has a first region for storing data to be stored in the plurality of storage units and a second region for storing control information for controlling the storage system, wherein each of the plurality of selectors, when receiving an access request for accessing to the second region from one of the plurality of processor sections, stores the data once into a corresponding one of the plurality of buffers thereof and sends the data thus stored to the one of the plurality of processor sections, wherein each of the plurality of selectors, when receiving an access request for accessing to the first region from one of the plurality of processor sections, sends the data to the one of the plurality of processor sections without using the buffer thereof, and wherein the plurality of buffers of each of the plurality of selectors are provided in one to one correspondence with the plurality of memories.
-
Specification