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Comparison of circuit layout designs

  • US 7,171,639 B2
  • Filed: 03/18/2004
  • Issued: 01/30/2007
  • Est. Priority Date: 03/18/2004
  • Status: Expired due to Fees
First Claim
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1. A machine-accessible medium that provides instructions, which when executed by a computing platform, cause said computing platform to perform operations comprising a method of:

  • obtaining a first circuit layout design;

    obtaining a second circuit layout design;

    generating a first topology graph for said first circuit layout design;

    generating a second topology graph for said second circuit layout design;

    comparing said first topology graph and said second topology graph to obtain a comparison result, wherein said comparison result comprises at least a first matched topology graph node pair and a second matched topology graph node pair connected via a topology graph line pair, said topology graph line pair having a pair of lengths and a pair of widths, wherein said method further comprises;

    comparing said pair of lengths to a length sensitivity parameter; and

    comparing said pair of widths to a width sensitivity parameter; and

    reporting said comparison result.

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