Multibit phase shifter with active and passive phase bits, and active phase bit therefor

• US 7,173,503 B1
• Filed: 07/29/2004
• Issued: 02/06/2007
• Est. Priority Date: 07/29/2004
• Status: Expired due to Fees

• Current Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Original Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Inventors: Cadotte, Roland Jr.
• Primary Examiner(s): Pascal; Robert
• Assistant Examiner(s): Glenn; Kimberly E.
• Application Number:
  US10/901,525
• Time in Patent Office: 922 Days
• Field of Search: 333/164, 333/156, 333/138, 333/139
• US Class Current: 333/164
• CPC Class Codes: H01P 1/18 Phase-shifters H01P1/165 takes precedence

Abstract

An RF phase shifter includes the cascade of active and passive RF phase shift bits, having different phase increments. The active phase shift bit includes a FET with source and drain. First and second RF single-pole, double throw switches have their common elements coupled to the source and drain, respectively, for selectively connecting one of the in-phase source signals and out-of-phase drain signals to a third switch, and for coupling the non-selected signal to a reference. The third switch outputs the available signal. Additional phase increments may be included to achieve phase shifts or differences other than 180°.

Claims

1. A phase shifter, comprising:

a solid-state device including a path for the flow of electrical current between first and second electrodes and a control electrode for controlling the flow of current through said path;

a source of signal to be phase shifted, said source of signal being coupled to said control electrode of said device, for controlling the flow of current through said path in response to said signal in such a manner that first electrode signal appearing at said first electrode in response to said signal coupled to said control electrode is in a first phase state relative thereto, and in such a manner that second electrode signal appearing at said second electrode in response to said signal coupled to said control electrode is in a second phase state, different from said first phase state;

a first switch including a common terminal coupled to said first electrode of said device and a first independent terminal coupled to reference potential, and also including a second independent terminal, for, in a first state of said first switch, coupling said first electrode of said device to said second independent terminal of said first switch, and for, in a second state, coupling said first electrode of said device to said reference potential;

a second switch including a common terminal coupled to said second electrode of said device and a first independent terminal, and also including a second independent terminal coupled to reference potential, for, in a first state of said second switch, coupling said second electrode of said device to said second independent terminal of said second switch, and for, in a second state of said second switch, coupling said second electrode of said device to said first independent terminal of said second switch;

a third switch including a common terminal, and first and second independent terminals, said first independent terminal of said third switch being coupled to said first independent terminal of said second switch and said second independent terminal of said third switch being coupled said second independent terminal of said first switch, said third switch connecting said common terminal of said third switch to said second independent terminal of said third switch in a first state of said third switch, and connecting said common terminal of said third switch to said first independent terminal of said third switch in said second state of said third switch; and

control means coupled to said first, second, and third switches, for, in a first nominal phase condition, simultaneously controlling said first, second, and third switches to said first states of said first, second, and third switches, and for, in a second nominal phase condition, simultaneously controlling said first, second, and third switches to said second states of said first, second, and third switches.

2. A phase shifter according to claim 1, wherein said first phase state of said first electrode signal appearing at said first electrode in response to said signal coupled to said control electrode is nominally 180°

, and said second phase state of said second electrode signal appearing at said second electrode in response to said signal coupled to said control electrode is nominally 0°

.

3. A phase shifter, comprising:

a solid-state device including a path for the flow of electrical current between first and second electrodes and a control electrode for controlling the flow of current through said path;

a source of signal to be phase shifted, said source of signal being coupled to said control electrode of said device, for controlling the flow of current through said path in response to said signal in such a manner that first electrode signal appearing at said first electrode in response to said signal coupled to said control electrode is out-of-phase relative thereto, and in such a manner that second electrode signal appearing at said second electrode in response to said signal coupled to said control electrode is in-phase relative thereto;

a first switch including a common terminal coupled to said first electrode of said device and a first independent terminal coupled to reference potential, and also including a second independent terminal, for, in a first state of said first switch, coupling said first electrode of said device to said second independent terminal of said first switch, and for, in a second state, coupling said first electrode of said device to said reference potential;

a second switch including a common terminal coupled to said second electrode of said device and a first independent terminal, and also including a second independent terminal coupled to reference potential, for, in a first state of said second switch, coupling said second electrode of said device to said second independent terminal of said second switch, and for, in a second state of said second switch, coupling said second electrode of said device to said first independent terminal of said second switch;

a third switch including a common terminal, and first and second independent terminals, said first independent terminal of said third switch being coupled to said first independent terminal of said second switch and said second independent terminal of said third switch being coupled said second independent terminal of said first switch, said third switch connecting said common terminal of said third switch to said second independent terminal of said third switch in a first state of said third switch, and connecting said common terminal of said third switch to said first independent terminal of said third switch in said second state of said third switch; and

control means coupled to said first, second, and third switches, for, in a 180°

condition, simultaneously controlling said first, second, and third switches to said first states of said first, second, and third switches, and for, in a 0°

condition, simultaneously controlling said first, second, and third switches to said second states of said first, second, and third switches.

4. An active electromagnetic RF phase bit, comprising:

a FET including source, drain, and gate electrodes;

direct-current biasing means coupled to said source, drain, and gate electrodes, for providing biasing energization to said FET;

source, drain, and gate direct-current blocking means coupled to said source, drain, and gate, respectively, of said FET, for providing RF ports into said bias energized source, drain, and gate electrodes of said FET;

an RF signal input path coupled to said gate direct-current blocking means, whereby electromagnetic RF applied to said RF input port is coupled to said gate electrode of said FET;

first, second, and third three-port, single-pole, double-throw RF switches, each including a common port, and first and second individual ports to which said common port is coupled in first and second states, respectively, of the RF switch;

said common port of said first RF switch being coupled to said drain direct-current blocking means, said first individual port of said first RF switch being coupled to RF reference potential;

said common port of said second RF switch being coupled to said source direct-current blocking means, said second individual port of said second RF switch being coupled to RF reference potential;

first coupling means coupling said first individual port of said third RF switch to said second port of said first RF switch;

second coupling means coupling said second individual port of said third RF switch to said first individual port of said second RF switch;

an RF output signal path coupled to said common port of said third RF switch; and

control means coupled to said first, second, and third RF switches for causing said third RF switch to assume said first state in response to a request for a 180°

phase condition and said second state in response to a request for a reference phase condition, and for causing said first and second RF switches to assume said first state in response to a request for a reference phase condition and said second state in response to a request for a 180°

phase condition.

5. A phase bit according to claim 4, wherein each of said first and second coupling means comprises an RF attenuator.

6. A phase bit according to claim 5, wherein each of said source and drain direct-current blocking means comprises a capacitor.

7. A phase bit according to claim 4, wherein each of said direct-current biasing means coupled to said source, drain, and gate electrodes, respectively, comprises at least an impedance element, exhibiting an impedance of at least 250 ohms at operational frequencies of said phase bit, coupled to said source, drain, and gate electrodes, respectively, and to a bias voltage source.

8. A phase bit according to claim 7, wherein each of said direct-current biasing means coupled to said source, drain, and gate electrodes, respectively, further comprises a capacitor coupled said impedance element and to said reference potential.

9. A multibit phase RF phase shifter, comprising:

a phase shifter path for the flow of RF signal between first and second phase shifter ports;

a first phase bit having a phase increment of less than 180°

relative to a reference value, said first phase bit comprising first and second differing lengths of transmission line, and first bit switching means coupled to said first and second lengths of transmission line for, in a first state of said first phase bit, connecting said first length of transmission line in said first path, and for, in a second state of said first phase bit, connecting said second length of transmission line in said phase shifter path;

an active second RF phase bit, comprising;

a FET including source, drain, and gate electrodes;

direct-current biasing means coupled to said source, drain, and gate electrodes, for providing biasing energization to said FET;

source, drain, and gate direct-current blocking means coupled to said source, drain, and gate, respectively, of said FET, for providing RF paths but not direct-current paths to said bias energized source, drain, and gate electrodes of said FET;

a second RF signal path coupled to said gate direct-current blocking means, whereby electromagnetic RF applied to a second phase bit RF input port is coupled to said gate electrode of said FET;

first, second, and third three-port, single-pole, double-throw RF switches, each including a common port, and first and second individual ports to which said common port is coupled in first and second states, respectively, of the RF switch;

said common port of said first RF switch being coupled to said drain direct-current blocking means, said first individual port of said first RF switch being coupled to RF reference potential;

said common port of said second RF switch being coupled to said source direct-current blocking means, said second individual port of said second RF switch being coupled to RF reference potential;

first coupling means coupling said first individual port of said third RF switch to said second port of said first RF switch;

second coupling means coupling said second individual port of said third RF switch to said first individual port of said second RF switch;

second RF phase bit control means coupled to said first, second, and third RF switches for causing said third RF switch to assume said first state in response to a request for a 180°

phase condition and said second state in response to a request for a reference phase condition, and for causing said first and second RF switches to assume said first state in response to a request for a reference phase condition and said second state in response to a request for a 180°

phase condition; and

second RF phase bit connection means coupled to said phase shifter path, to said RF input port and to said common port of said third RF switch, for cascading said first phase bit with said second phase bit.

10. A phase shifter according to claim 9, wherein said first phase bit includes no active element other than switching element(s).

11. A phase shifter, comprising:

a solid-state device including a path for the flow of electrical current between first and second electrodes and a control electrode for controlling the flow of current through said path;

a source of signal to be phase shifted, said source of signal being coupled to said control electrode of said device, for controlling the flow of current through said path in response to said signal in such a manner that first electrode signal appearing at said first electrode in response to said signal coupled to said control electrode is in a first phase state relative thereto, and in such a manner that second electrode signal appearing at said second electrode in response to said signal coupled to said control electrode is in a second phase state, different from said first phase state;

a first switch including a common terminal coupled to said first electrode of said device and a first independent terminal coupled to reference potential, and also including a second independent terminal, for, in a first state of said first switch, coupling said first electrode of said device to said second independent terminal of said first switch to thereby define a first signal path for the flow of signal from said first electrode of said device to said second independent terminal of said first switch, and for, in a second state, coupling said first electrode of said device to said reference potential;

a second switch including a common terminal coupled to said second electrode of said device and a first independent terminal, and also including a second independent terminal coupled to reference potential, for, in a first state of said second switch, coupling said second electrode of said device to said second independent terminal of said second switch, and for, in a second state of said second switch, coupling said second electrode of said device to said first independent terminal of said second switch, thereby defining a second signal path for the flow of signal from said second electrode of said device to said second independent terminal of said second switch;

a third switch including a common terminal, and first and second independent terminals, said first independent terminal of said third switch being coupled by a fourth signal path to said first independent terminal of said second switch and said second independent terminal of said third switch being coupled by a third signal path to said second independent terminal of said first switch, said third switch connecting said common terminal of said third switch to said second independent terminal of said third switch in a first state of said third switch, and connecting said common terminal of said third switch to said first independent terminal of said third switch in said second state of said third switch;

control means coupled to said first, second, and third switches, for, in a first nominal phase condition, simultaneously controlling said first, second, and third switches to said first states of said first, second, and third switches, and for, in a second nominal phase condition, simultaneously controlling said first, second, and third switches to said second states of said first, second, and third switches; and

a passive phase introducing element coupled in at least one of said first, second, third, and fourth signal paths, for modifying the phase difference occurring upon simultaneous control by said control means between said first and second nominal phase conditions to be other than 180°

.

12. A phase shifter according to claim 11, wherein said first phase state of said first electrode signal appearing at said first electrode in response to said signal coupled to said control electrode is nominally 180°

, and said second phase state of said second electrode signal appearing at said second electrode in response to said signal coupled to said control electrode is nominally 0°

.

13. A phase shifter according to claim 11, further comprising a controllable passive RF phase bit including an RF path having a second phase increment different from said phase difference.