Method and apparatus for processing digital pixel output signals

• US 7,173,656 B1
• Filed: 12/03/1997
• Issued: 02/06/2007
• Est. Priority Date: 12/03/1997
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Kumar, Sasi K., Bakhle, Ashutosh J., Dunton, Randell R.
• Primary Examiner(s): Srivastava; Vivek
• Assistant Examiner(s): Hannett; James M.
• Application Number:
  US08/984,005
• Time in Patent Office: 3,352 Days
• Field of Search: 348/241, 348/242, 348/243, 348/250, 348/248, 348/314, 348/229, 348/576, 348/607, 382/274
• US Class Current: 348/243
• CPC Class Codes: H04N 25/63 applied to dark current
• CPC Class Codes: H04N 5/20 Circuitry for controlling amplitude response
• CPC Class Codes: H04N 5/21 Circuitry for suppressing or minimising disturbance, e.g. moiré or halo

Abstract

Briefly, in accordance with one embodiment of the invention, a digital camera includes: a digital imaging array including a plurality of pixels, and image processing circuitry to process the digital pixel output signals produced by the imaging array. The imaging processing circuitry is adapted to process saturated digital pixel output signals differently from non-saturated digital pixel output signals.

In accordance with another embodiment of the invention, at least one integrated circuit includes image processing circuitry. The processing circuitry is adapted to process digital pixel output signals produced by a digital imaging array. The image processing circuitry is further adapted to process saturated digital pixel output signals differently from non-saturated digital pixel output signals.

In accordance with yet one more embodiment of the invention, a method of processing digital pixel output signals produced by a digital imaging array includes processing saturated digital pixel output signals differently from non-saturated digital pixel output signals.

Claims

1. At least one integrated circuit comprising:

image processing circuitry;

said image processing circuitry being adapted to process digital pixel output signals produced by a digital imaging array including imaging array sensors; and

said image processing circuitry being adapted to process saturated digital pixel output signals differently from non-saturated digital pixel output signals including sampling a dark image in regions corresponding to regions of saturated digital pixel output signals, wherein said image processing circuitry processes saturated digital pixel output signals by subtracting an estimate of a dark image fixed pattern noise for said imaging array sensors and estimates dark fixed pattern noise by sampling from the dark image comprising stored digital pixel output signals.

2. The at least one integrated circuit of claim 1, wherein said image processing circuitry is adapted for use with imaging array sensors comprising at least one of a CCD sensor and a CMOS sensor.

3. The at least one integrated circuit of claim 1, wherein the image processing circuitry comprises dark fixed pattern noise reduction circuitry.

4. The at least one integrated circuit of claim 3, wherein the fixed pattern noise reduction circuitry comprises dark fixed pattern noise reduction circuitry.

5. The at least one integrated circuit of claim 1, wherein said image processing circuitry is adapted to detect regions of saturated digital pixel output signals in an image of interest.

6. A digital camera comprising:

a digital imaging array comprising a plurality of pixels, and imaging processing circuitry to process the digital pixel output signals produced by said imaging array; and

said imaging processing circuitry being adapted to process saturated digital pixel output signals differently from non-saturated digital pixel output signals, including sampling a dark image in regions corresponding to regions of saturated digital pixel output signals in an image of interest, wherein said imaging processing circuitry estimates dark fixed pattern noise by sampling from the dark image comprising stored digital pixel output signals and processes saturated digital pixel output signals by subtracting an estimate of a dark image fixed pattern nose for said imaging array sensors.

7. The digital camera of claim 6, wherein said image processing circuitry is adapted for use with imaging array sensors comprising at least one of a CCD sensor and CMOS sensor.

8. The digital camera of claim 6, wherein the image processing circuitry comprises fixed pattern noise reduction circuitry.

9. The digital camera of claim 8, wherein the fixed pattern noise reduction circuitry comprises dark fixed pattern noise reduction circuitry.

10. The digital camera of claim 6, wherein said image processing circuitry is adapted to detect regions of saturated digital pixel output signals in an image of interest.

11. A method of processing digital pixel output signals produced by a digital imaging array including imaging array sensors comprising:

processing saturated digital pixel outputs differently from non-saturated digital pixel output signals including sampling a dark image in regions corresponding to the regions of saturated digital pixel output signals; and

estimating a dark image fixed pattern noise for said imaging array sensors including sampling from the dark image comprising stored digital pixel output signals, wherein processing saturated digital pixel output signals differently includes subtracting an estimate of the dark image fixed pattern noise for said imaging array sensors.

12. The method of claim 11, wherein said imaging array sensors comprise at least one of a CD sensor and a CMOS sensor.

13. The method of claim 11, wherein processing saturated digital pixel output signals comprises fixed pattern noise reduction processing.

14. The method of claim 13, wherein fixed pattern noise reduction processing comprises dark fixed pattern noise reduction processing.

15. The method of claim 11, wherein processing saturated digital pixel output signals includes detecting regions of saturated digital pixel output signals in an image of interest.