Power module comprising at least two substrates and method for producing the same

• US 7,176,057 B2
• Filed: 04/01/2003
• Issued: 02/13/2007
• Est. Priority Date: 04/04/2002
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Hable, Wolfram
• Primary Examiner(s): Tran; Thien F.
• Application Number:
  US10/510,455
• Publication Number:
  US 20050237722A1
• Time in Patent Office: 1,414 Days
• Field of Search: 438107-112, 438/125, 438/126, 257/133, 257/147, 257/677, 257/685, 257/687, 257/705, 257/723
• US Class Current: 438/107
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/49 of a plurality of wire connectors
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/4334 Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 25/162 the devices being mounted on two or more different substrates
• CPC Class Codes: H01L 25/165 Containers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/0101 Neon [Ne]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01039 Yttrium [Y]
• CPC Class Codes: H01L 2924/01052 : Tellurium [Te]
• CPC Class Codes: H01L 2924/01068 : Erbium [Er]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/1306 : Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H05K 1/148 : Arrangements of two or more hingeably connected rigid printed circuit boards, i.e. connected by flexible means

Abstract

A power module and a method for producing it. The power module has a first substrate having power semiconductor chips, and a second substrate populated with signal semiconductor chips. The substrates are oriented parallel one above the other, their placement sides being arranged facing one another, and the second substrate, with the aid of bonding wires bent in hingelike fashion, being held at a defined distance d from the first substrate and being mechanically fixed in a plastic housing and electrically connected.

Claims

1. A method for producing a power module having a first substrate populated with power semiconductor chips, and having a second substrate populated with signal semiconductor chips, the substrates in the power module being oriented parallel one above the other and their placement sides being arranged facing one another, and bonding wires bent in a hingelike manner electrically connecting the two placement sides to one another and defining the distance between the first and second substrates and mechanically fixing them, the method comprising:

providing a first substrate populated with power semiconductor chips, and a second substrate populated with signal semiconductor chips;

orientating the first substrate and second substrate such that their placement sides are arranged next to one another and edge regions of the placement sides of the two substrates that have bonding areas lie next to one another;

connecting the first substrate and the second substrate at edge regions having bonding areas to bonding wires arranged next to one another in hinge-type fashion;

folding over of the second substrate through 180°

with bending of the bonding wires arranged in hinge-type fashion, so that the substrates are oriented parallel one above the other and the first placement side and the second placement side are arranged facing one another; and

packaging of the power module in a plastic housing.

2. The method of claim 1, comprising where in order to provide a first substrate with power semiconductor chips, coating a ceramic board with a conductor track structure having, in an edge region, a row of bonding areas arranged next to one another with a predetermined grid dimension, the power semiconductor chips being arranged on the first substrate and being connected among one another and also to the conductor track structure via bonding wires with the bonding area row being left free, and in addition, on the ceramic board, inner flat conductor ends of external flat conductors being fixed with connection to the conductor track structure.

3. The method of claim 2, comprising where in order to provide a second substrate with signal semiconductor chips, providing a printed circuit board with a conductor track structure having, in an edge region, a row of bonding areas arranged next to one another, the number and grid dimension of which correspond to the bonding area row of the first substrate, the signal semiconductor chips being arranged on the second substrate and being connected among one another and also to the conductor track structure via bonding wires with the bonding area row being left free.

4. The method of claim 1, comprising where in order to orient the two substrates, arranging the bonding area rows of the substrates next to one another, so that it is possible to produce bonding wires on the oriented bonding areas of the two substrates that are adapted to one another.

5. The method of claim 1, comprising connecting the substrates by application of bonding wires between the bonding areas by means of thermocompression sonic bonding of aluminum and/or aluminum alloy bonding wires with a diameter of between 100 and 300 micrometers.

6. The method of claim 1, comprising folding over the second substrate through 180°

with bending of the bonding wires arranged in hinge-type fashion, so that the substrates are oriented parallel one above the other and their placement sides are arranged facing one another, using a vacuum tool.

7. The method of claim 1, comprising packaging of the power module in a plastic housing by means of injection molding technology with the substrates arranged one above the other being embedded in a plastic housing composition.

8. The method of claim 1, comprising in that the packaging of the power module in a plastic housing is effected by arranging the two substrates in a prefabricated plastic housing and the cavities between the substrates and the prefabricated plastic housing are filled with silicone composition.

9. The method of claim 1, comprising wherein before the power module is packaged in a plastic housing, mounting the first substrate on a metal board made of copper or a copper alloy as heat sink, the metal board forming an outer wall of the plastic housing.

10. The method of claim 1, comprising wherein after the power module has been packaged in a plastic housing, external flat conductors project from the plastic housing, which are electrically connected to the power semiconductor chips and via the bonding wires bent in hinge-type fashion to the signal semiconductor chips, external flat conductors having a larger cross section than external flat conductors for signal semiconductor chips being used as external flat conductors for the power semiconductor chips.