Semiconductor device having deep trench charge compensation regions and method
First Claim
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1. A semiconductor device comprising:
- a body of semiconductor material; and
a charge compensation region including a trench formed in the body of semiconductor material, wherein the trench comprises;
a first epitaxial layer of a first conductivity type formed overlying sidewalls and a lower surface of the trench;
a first intrinsic layer formed overlying the first epitaxial layer;
a second epitaxial layer of a second conductivity type formed overlying the first intrinsic layer, wherein the first intrinsic layer is formed between the first and second epitaxial layers to reduce intermixing of opposite conductivity type dopants; and
a second intrinsic layer formed overlying the second epitaxial layer.
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Abstract
In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a charge compensating trench formed in proximity to active portions of the device. The charge compensating trench includes a trench filled with various layers of semiconductor material including opposite conductivity type layers.
106 Citations
20 Claims
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1. A semiconductor device comprising:
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a body of semiconductor material; and a charge compensation region including a trench formed in the body of semiconductor material, wherein the trench comprises; a first epitaxial layer of a first conductivity type formed overlying sidewalls and a lower surface of the trench; a first intrinsic layer formed overlying the first epitaxial layer; a second epitaxial layer of a second conductivity type formed overlying the first intrinsic layer, wherein the first intrinsic layer is formed between the first and second epitaxial layers to reduce intermixing of opposite conductivity type dopants; and a second intrinsic layer formed overlying the second epitaxial layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A semiconductor device comprising:
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a body of semiconductor material having first and second opposing major surfaces; a first doped region formed in the body of semiconductor material adjacent the first major surface and comprising a first conductivity type; a second doped region formed in the first doped region and comprising a second conductivity type; a charge compensating trench region formed in the body of semiconductor material adjacent the first doped region, wherein the charge compensating trench region comprises; a trench; a first epitaxial semiconductor layer of the second conductivity type formed adjoining surfaces of the trench; a first intrinsic layer formed overlying the first semiconductor layer; a second epitaxial semiconductor layer of the first conductivity type formed adjacent the first semiconductor layer, wherein the first intrinsic layer is formed between the first and second epitaxial layers to reduce intermixing of opposite conductivity type dopants; a second intrinsic layer formed overlying the second semiconductor layer; and a control electrode formed adjacent the first and second doped regions. - View Dependent Claims (14, 15, 16)
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17. A semiconductor device comprising:
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a body of semiconductor material having first and second opposing major surfaces; a trench formed in the body of semiconductor material; a first epitaxial semiconductor layer of a first conductivity type formed adjoining surfaces of the trench; a second epitaxial semiconductor layer of a second conductivity type formed adjacent to the first semiconductor layer to form a charge compensating trench region; a first buffer semiconductor layer between the first and second epitaxial semiconductor layers, wherein the first buffer layer is configured to reduce intermixing of dopants between the first and second semiconductor layers; a second buffer semiconductor layer formed overlying the second epitaxial semiconductor layer; a first doped region in the body of semiconductor material adjacent the charge compensating trench region, wherein the first doped region comprises the second conductivity type; a second doped region in the first doped region and comprising the first conductivity type; and a control electrode adjacent the first and second doped regions. - View Dependent Claims (18, 19, 20)
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Specification