Display device
First Claim
Patent Images
1. An active matrix display device, comprising:
- a substrate having a plurality of gate signal lines, a plurality of source signal lines and a plurality of pixel electrodes disposed on the respective portions where the gate signal lines and the source signal lines cross each other, anda thin film transistor electrically connected to one of the plurality of pixel electrodes,wherein first video signals of the same polarity are supplied to said plurality of pixel electrodes through said plurality of source signal lines during a first frame period,wherein second video signals of the polarity opposite to that of said first video signal are supplied to said plurality of pixel electrodes through said plurality of source signal lines during a second frame period subsequent to said first frame period,wherein a length of said first frame period and said second frame period is set to 8.3 msec or less in order to avoid flicker,wherein each of said first frame period and said second frame period is a period in which select signals are supplied to all of the plurality of gate signal lines until one image is displayed, andwherein intervals of said plurality of gate signal lines or said plurality of source signal lines are set to 20 μ
m or less.
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Abstract
Display bright in contrast can be obtained without discrination and flicker in the display device of the direct vision type whose pixel pitches are short to 20 μm or less. A liquid crystal panel is driven through the frame inverse driving method, and the vertical frame frequency is set to 120 Hz or more. Also, each of the pixels is arranged to correspond to one of R, G and B of color filters disposed on a TFT substrate side.
22 Citations
41 Claims
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1. An active matrix display device, comprising:
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a substrate having a plurality of gate signal lines, a plurality of source signal lines and a plurality of pixel electrodes disposed on the respective portions where the gate signal lines and the source signal lines cross each other, and a thin film transistor electrically connected to one of the plurality of pixel electrodes, wherein first video signals of the same polarity are supplied to said plurality of pixel electrodes through said plurality of source signal lines during a first frame period, wherein second video signals of the polarity opposite to that of said first video signal are supplied to said plurality of pixel electrodes through said plurality of source signal lines during a second frame period subsequent to said first frame period, wherein a length of said first frame period and said second frame period is set to 8.3 msec or less in order to avoid flicker, wherein each of said first frame period and said second frame period is a period in which select signals are supplied to all of the plurality of gate signal lines until one image is displayed, and wherein intervals of said plurality of gate signal lines or said plurality of source signal lines are set to 20 μ
m or less. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. An active matrix display device, comprising:
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a substrate having a plurality of gate signal lines, a plurality of source signal lines and a plurality of pixel electrodes disposed on the respective portions where the gate signal lines and the source signal lines cross each other, and a thin film transistor electrically connected to one of the plurality of pixel electrodes, wherein video signals of the same polarity are supplied to said plurality of pixel electrodes through said plurality of source signal lines, wherein said polarity of said video signals changes for each one-frame period, wherein a length of said one-frame period is set to 8.3 msec or less in order to avoid flicker, wherein said one-frame period is a period in which select signals are supplied to all of the plurality of gate signal lines until one image is displayed, and wherein intervals of said plurality of gate signal lines or said plurality of source signal lines are set to 20 μ
m or less. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25)
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26. An active matrix display device, comprising:
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a substrate including a plurality of gate signal lines, a plurality of source signal lines and a plurality of switching elements disposed on the respective portions where the gate signal lines and the source signal lines cross each other, wherein video signals of the same polarity are supplied to said plurality of switching elements through said plurality of source signal lines, wherein select signals which select said video signals are supplied to said plurality of switching elements through said plurality of gate signal lines, wherein video signals selected by said select signals are supplied to a plurality of pixel electrodes through said plurality of switching elements, wherein said polarity of said video signal changes for each one-frame period, wherein a length of said one-frame period is set to 8.3 msec or less in order to avoid flicker, wherein said one-frame period is a period in which select signals are supplied to all of the plurality of gate signal lines until one image is displayed, and wherein intervals of said plurality of gate signal lines or said plurality of source signal lines are set to 20 μ
m or less. - View Dependent Claims (27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38)
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39. An active matrix display device, comprising:
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a substrate having a plurality of gate signal lines, a plurality of source signal lines and a plurality of pixel electrodes disposed on the respective portions where the gate signal lines and the source signal lines cross each other, and a thin film transistor electrically connected to one of the plurality of pixel electrodes, wherein video signals of the same polarity are supplied to said plurality of pixel electrodes through said plurality of source signal lines, wherein said polarity of said video signals changes for each one-frame period, wherein a frame frequency is set to 120 Hz or more in order to avoid flicker, wherein one-frame period is a period in which select signals are supplied to all of the plurality of gate signal lines until one image is displayed, and wherein intervals of said plurality of gate signal lines or said plurality of source signal lines are set to 20 μ
m or less. - View Dependent Claims (40, 41)
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Specification