Two-phase programming of a flash memory
First Claim
1. A method of storing a datum in a memory, comprising the steps of:
- (a) placing a cell of the memory in a first state that is indicative of the datum; and
(b) placing said cell in a second state that is indicative of the datum, said second state having a longer data retention time than said first state.
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Accused Products
Abstract
A datum is stored in a memory by placing a memory cell in a first state that is indicative of the datum, and later placing the same or a different cell in a second state that is indicative of the same datum. If a different cell is placed in the second state, both cells are programmed to store the same number of bits, and then preferably the first cell is erased. Preferably, the first cell is placed in the first state by the application thereto of a first train of voltage pulses until the cell'"'"'s threshold voltage exceeds a first reference voltage, and the first or second cell is placed in the second state by the application thereto of a second train of voltage pulses until the cell'"'"'s threshold voltage exceeds a second reference voltage.
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Citations
18 Claims
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1. A method of storing a datum in a memory, comprising the steps of:
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(a) placing a cell of the memory in a first state that is indicative of the datum; and (b) placing said cell in a second state that is indicative of the datum, said second state having a longer data retention time than said first state. - View Dependent Claims (2, 3, 4, 5)
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6. A memory device comprising:
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(a) at least one cell; and (b) a controller operative; (i) to place one of said at least one cell in a first state that is indicative of a datum, and (ii) to place said one cell in a second state that is indicative of said datum, said second state having a longer data retention time than said first state.
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7. A method of storing a datum in a memory that includes a plurality of cells, the method comprising the steps of:
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(a) placing a first cell of the memory in a first state that is indicative of the datum; and (b) placing a second cell of the memory in a second state that is indicative of the datum, said second state having a longer data retention time than said first state; wherein said first cell and said second cell then store an identical number of bits. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A memory device comprising:
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(a) an array of cells; and (b) a controller operative; (i) to place a first of said cells in a first state that is indicative of a datum, and (ii) to place a second of said cells in a second state that is indicative of said datum, said second state having a longer data retention time than said first state, wherein said first cell and said second cell then store an identical number of bits.
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14. A method of operating a memory that includes a plurality of cells, comprising the steps of:
(a) for each of at least one of the cells; (i) comparing a threshold voltage of said each cell to a first reference voltage that is indicative of a certain bit pattern, and (ii) comparing said threshold voltage of said each cell to a second reference voltage that is greater than said first reference voltage and that also is indicative of said bit pattern; and (b) for each said at least one cell, if said comparing shows that said threshold voltage of said each cell is between said first reference voltage and said second reference voltage;
applying at least one voltage pulse to said each cell until said threshold voltage of said each cell is greater than said second reference voltage.
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15. A memory device comprising:
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(a) at least one cell; and (b) a controller operative, for each said at least one cell for which a comparison of a threshold voltage of said each cell to a first reference voltage that is indicative of a certain bit pattern and to a second reference voltage that is indicative of said bit pattern shows that said threshold voltage of said each cell is between said first reference voltage and said second reference voltage;
to apply at least one voltage pulse to said each cell until said threshold voltage of said each cell is greater than said second reference voltage.
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16. A method of operating a memory that includes a plurality of cells, comprising the steps of:
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(a) for each of at least one of the cells; (i) comparing a threshold voltage of said each cell to a first reference voltage that is indicative of a certain bit pattern, and (ii) comparing said threshold voltage of said each cell to a second reference voltage that is greater than said first reference voltage and that also is indicative of said bit pattern; and (b) for each said at least one cell, if said comparing shows that said threshold voltage of said each cell is between said first reference voltage and said second reference voltage;
applying at least one voltage pulse to a corresponding other cell until a threshold voltage of said corresponding other cell is greater than said second reference voltage. - View Dependent Claims (17)
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18. A memory device comprising:
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(a) an array of cells; and (b) a controller operative, for each said cell of said array for which a comparison of a threshold voltage of said each cell to a first reference voltage that is indicative of a certain bit pattern and to a second reference voltage that is indicative of said bit pattern shows that said threshold voltage of said each cell is between said first reference voltage and said second reference voltage;
to apply at least one voltage pulse to a corresponding other cell of said array until a threshold voltage of said corresponding other cell is greater than said second reference voltage.
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Specification