Method and architecture for dual-mode linear and saturated power amplifier operation
First Claim
1. A transmitter comprising:
- a variable gain amplifier (VGA) for applying a first gain to a first modulated signal to generate a second modulated signal;
a power amplifier for applying a second gain to the second modulated signal to generate a burst output signal, wherein the power amplifier comprises a first power transistor; and
a collector control circuit for controlling the second gain by supplying a fixed collector voltage to a collector of the first power transistor in response to a first control signal, and by supplying a ramp control signal to the collector of the first power transistor in response to a second control signal;
a baseband circuit for converting a data bit stream into a baseband signal; and
an upconverter circuit for modulating the baseband signal onto a carrier frequency,wherein the data bit stream comprises of a series of leading bits followed by a series of data bits followed by a series of trailing bits,wherein when the transmitter is operating in Global System for Mobile Telecommunication (GSM) mode, a first digital-to-analog conversion (DAC) circuit in the baseband circuit performs digital-to-analog conversion on the data bit stream to generate the baseband signal, andwherein when the transmitter is operating in Enhanced Data for Global Evolution (EDGE) mode, the first DAC circuit performs digital-to-analog conversion on an adjusted bit stream, the adjusted bit stream being created by replacing the series of leading bits and the series of trailing bits in the data bit stream with replacement bits, the replacement bits all having a common logic state.
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Accused Products
Abstract
An RF transmitter provides both GSM and EDGE capability by implementing collector voltage control over the power transistor(s) in a power amplifier. During EDGE mode, linear base-biasing a power amplifier (PA) allows collector control to provide either saturated mode PA operation (during ramp up/ramp down) or linear mode PA operation (during data burst). Collector control can therefore be used to provide the accurate ramp up and ramp down profiles required for both GSM and EDGE burst output signals, and can also be used to set the level of the constant envelope data burst of a GSM burst output signal, while linear mode PA operation can provide the non-constant envelope EDGE data burst. A variable gain amplifier is used to adjust the input signal to the power amplifier such that the desired transmission level is achieved.
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Citations
18 Claims
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1. A transmitter comprising:
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a variable gain amplifier (VGA) for applying a first gain to a first modulated signal to generate a second modulated signal; a power amplifier for applying a second gain to the second modulated signal to generate a burst output signal, wherein the power amplifier comprises a first power transistor; and a collector control circuit for controlling the second gain by supplying a fixed collector voltage to a collector of the first power transistor in response to a first control signal, and by supplying a ramp control signal to the collector of the first power transistor in response to a second control signal; a baseband circuit for converting a data bit stream into a baseband signal; and an upconverter circuit for modulating the baseband signal onto a carrier frequency, wherein the data bit stream comprises of a series of leading bits followed by a series of data bits followed by a series of trailing bits, wherein when the transmitter is operating in Global System for Mobile Telecommunication (GSM) mode, a first digital-to-analog conversion (DAC) circuit in the baseband circuit performs digital-to-analog conversion on the data bit stream to generate the baseband signal, and wherein when the transmitter is operating in Enhanced Data for Global Evolution (EDGE) mode, the first DAC circuit performs digital-to-analog conversion on an adjusted bit stream, the adjusted bit stream being created by replacing the series of leading bits and the series of trailing bits in the data bit stream with replacement bits, the replacement bits all having a common logic state. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for operating a Global System for Mobile Telecommunication (GSM)/Enhanced Data for Global Evolution (EDGE) dual-mode transmitter, the method comprising:
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generating a GSM-compliant burst output signal by saturation base-biasing a power transistor and regulating a collector voltage of the power transistor to amplify a GMSK-modulated signal into the GSM-compliant burst output signal, wherein regulating the collector voltage of the power transistor to amplify the GMSK-modulated signal comprises setting the collector voltage of the power transistor equal to a first ramp control signal; generating a ramp up portion of an EDGE-compliant burst output signal by linear base-biasing the power transistor and regulating the collector voltage of the power transistor to amplify a first portion of a Eight Phase Shift Keying (8PSK)-modulated signal into the ramp up portion of the EDGE-compliant burst output signal, whereby the power transistor operates in saturated mode, wherein regulating the collector voltage of the power transistor to amplify the first portion of the 8PSK-modulated signal comprises setting the collector voltage of the power transistor equal to a second ramp control signal; generating a data burst portion of the EDGE-compliant burst output signal by linear base-biasing the power transistor and setting the collector voltage of the power transistor equal to a supply voltage to amplify a second portion of the 8PSK-modulated signal into the data burst portion of the EDGE-compliant burst output signal, whereby the power transistor operates in linear mode; generating a ramp down portion of the EDGE-compliant burst output signal by linear base-biasing the power transistor and regulating the collector voltage of the power transistor to amplify a third portion of the 8PSK-modulated signal into the ramp down portion of the EDGE-compliant burst output signal, whereby the power transistor operates in saturated mode, wherein regulating the collector voltage of the power transistor to amplify the third portion of the 8PSK-modulated signal comprises setting the collector voltage of the power transistor equal to the second ramp control signal, and; generating the second baseband signal and the second ramp control signal from an EDGE digital data stream, the EDGE digital data stream comprising a set of leading bits followed by a set of data bits followed by a set of trailing bits, wherein generating the second baseband signal comprises; replacing the set of leading bits and the set of trailing bits with a first set of replacement bits and a second set of replacement bits, respectively, to generate an adjusted digital data stream, wherein the first set of replacement bits and the second set of replacement bits all have a common logic state; and performing digital-to-analog conversion on the adjusted digital data stream to generate the second baseband signal. - View Dependent Claims (12)
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13. A method for operating a transmitter, the method comprising:
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receiving a first digital data bit stream, the first digital data bit stream comprising a first set of leading bits followed by a first set of data bits followed by a first set of trailing bits; replacing the first set of leading bits with a first set of constant replacement bits to generate a first modified bit stream; generating a first modulated signal by applying a first modulation type to the first modified bit stream; amplifying the first modulated signal into a ramp up portion of a first burst output signal; generating a second modulated signal by applying the first modulation type to the first set of data bits; amplifying the second modulated signal into a data burst portion of the first burst output signal; replacing the first set of trailing bits with a second set of constant replacement bits to generate a second modified bit stream; generating a third modulated signal by applying the first modulation type to the second modified bit stream; and amplifying the second modulated signal into a ramp down portion of the first burst output signal. - View Dependent Claims (14, 15, 16, 17, 18)
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Specification