Reduction of false alarms in PCB inspection

• US 7,177,458 B1
• Filed: 09/10/2000
• Issued: 02/13/2007
• Est. Priority Date: 09/10/2000
• Status: Expired due to Fees

• Current Assignee: Orbotech Limited (KLA Corporation)
• Original Assignee: Orbotech Limited (KLA Corporation)
• Inventors: Savareigo, Nissim, Arad, Nur, Shalom, Dan
• Primary Examiner(s): Mancuso; Joseph
• Assistant Examiner(s): DULANEY, KATHLEEN YUAN
• Application Number:
  US10/363,982
• Time in Patent Office: 2,347 Days
• Field of Search: 382/145, 348/126, 702/35, 250/559.45
• US Class Current: 382/145
• CPC Class Codes: G01N 21/956 Inspecting patterns on the surface of objects contactless testing of electronic circuits G01R31/308; testing currency G07D; manufacturing processes per se of semiconductor devices implementing a measuring step H01L22/10
• CPC Class Codes: G01N 21/95607 using a comparative method
• CPC Class Codes: G01R 31/309 of printed or hybrid circuits or circuit substrates
• CPC Class Codes: G06T 2207/10016 Video; Image sequence
• CPC Class Codes: G06T 2207/30141 Printed circuit board [PCB]
• CPC Class Codes: G06T 7/0004 Industrial image inspection
• CPC Class Codes: G06V 10/22 by selection of a specific region containing or referencing a pattern; Locating or processing of specific regions to guide the detection or recognition
• CPC Class Codes: G06V 10/44 Local feature extraction by analysis of parts of the pattern, e.g. by detecting edges, contours, loops, corners, strokes or intersections; Connectivity analysis, e.g. of connected components
• CPC Class Codes: G06V 10/56 relating to colour

Abstract

A method for automatically optically inspecting an electrical circuit (12), comprising: acquiring at least one optical image of an electrical circuit (12); generating at least one first inspection image from the at least one image and determining regions of candidate defects (236) therefrom; generating at least one additional inspection image for regions surrounding candidate defects (236), said at least one additional inspection image at least partially including optical information not included in the at least one first inspection image; and determining whether the candidate defect (236) is a specious defect by inspecting the at least one additional inspection image.

Claims

1. A method for automatically optically inspecting an electrical circuit, comprising:

acquiring at least one non-binary optical image of an electrical circuit;

generating at least one binary first inspection image from the at least one non-binary optical image and processing said binary first inspection image to determine therefrom regions of candidate defects in the electrical circuit;

generating at least one additional inspection image, from said at least one non-binary optical image, for regions surrounding candidate defects, said at least one additional inspection image at least partially including information for an optical characteristic that is not included in the at least one binary first inspection image; and

determining whether the candidate defect is a specious defect by inspecting the at least one additional inspection image.

2. A method according to claim 1 wherein acquiring includes acquiring a polychromatic image of the electrical circuit.

3. A method according to claim 2 wherein the polychromatic image comprises a red, a green and a blue component.

4. A method according to claim 3 wherein the additional inspection image comprises each of the red, green and blue components acquired in the polychromatic image.

5. A method according to claim 1 wherein the binary first inspection image is derived only from a red color component of the acquired image.

6. A method according to claim 1 and wherein the at least one binary first inspection image includes a monochromatic gray level representation of the electrical circuit.

7. A method according to claim 6 wherein the monochromatic gray level representation is derived only from a red color component of the acquired image.

8. A method according to claim 1 and wherein the binary first inspection image and the additional inspection image are derived from the same optical image.

9. A method according to claim 1 and wherein the candidate defects are determined automatically.

10. A method according to claim 1 and wherein the actual defects are determined automatically.

11. A method of inspecting an electrical circuit, comprising:

acquiring a non-binary image of an electrical circuit;

processing said non-binary image to derive a binary representation of said electrical circuit;

determining the presence of a candidate defect in the electrical circuit at least in part from analyzing the binary representation;

defining a portion of said non-binary image corresponding to a region surrounding said candidate defect; and

determining the presence of an actual defect in the electrical circuit from analyzing said portion of the non-binary image.

12. A method according to claim 11 wherein the binary representation covers a larger extent of the circuit than said portion of the non-binary image.

13. A method according to claim 11 including:

providing a gray level monochrome representation of the circuit, and

determining candidate defects in the electrical circuit at least in part by analyzing both the binary representation and the gray level monochrome representation.

14. A method according to claim 13 and including identifying real defects from analyzing the binary representation and the gray level monochrome representation.

15. A method according to claim 11 wherein defects determined utilizing said binary image include actual defects and wherein said actual defects include one or more of:

missing features in an electrical circuit, misplaced features in an electrical circuit, extraneous features in an electrical circuit, pinholes and scratches.

16. A method according to claim 11 wherein the binary representation is prepared to a resolution which is finer than an optical resolution of the non-binary image from which it is derived.

17. A method according to claim 11 wherein candidate defects comprise suspected shape aberration in a metal conductor in the electrical circuit.

18. A method according to claim 17 wherein in an optical image of the electrical circuit metalized portions in the electrical circuit have a first optical characteristic, non-metalized portions have a second optical characteristic, and regions of suspected shape aberration have a third optical characteristic which is different from the optical characteristics of the metalized portions and the non-metalized portions.

19. A method according to claim 18 wherein the optical characteristic comprises intensity of reflectance.

20. A method according to claim 18 wherein the optical characteristic comprises color.

21. A method claim 11 wherein processing said non-binary image comprises selecting a gray level image from a single channel of a multichannel polychromatic image of the electrical circuit.

22. A method according to claim 11 wherein the non-binary image is a polychromatic image of the electrical circuit.

23. Apparatus for automatically optically inspecting electrical circuits, comprising:

at least one optical sensor operative to acquire a non-binary image of an electrical circuit;

a first image processor operative to generate a binary representation of the electrical circuit from the non-binary image and to analyze said binary representation to determine therefrom suspected defects in the electrical circuit;

a snapshot generator operative to receive said non-binary image from the at least one optical sensor, and reports of suspected defects from the first image processor, and to generate non-binary neighborhood images defining regions surrounding suspected defects; and

an image post processor operative to analyze the non-binary neighborhood images and to determine therefrom the presence of real defects.

24. Apparatus according to claim 23 wherein the first image processor generates a first representation which is a binary representation of the electrical circuit.

25. Apparatus according to claim 24 wherein the optical sensor has an optical resolution and the binary representation of the electrical circuit is generated a resolution that is finer than the optical resolution.

26. Apparatus according to claim 23 wherein, suspected defects comprise false defects and real defects, and the image post processor is operative to analyze said neighborhood images to distinguish false defects from real defects.

27. Apparatus according to claim 24 additionally comprising a gray level image processor, wherein at least some anomalies detected by the gray level image processor are real defects and at least some anomalies detected by the binary image processor are false defects.

28. Apparatus according to claim 23 wherein said neighborhood images are polychromatic images.

29. Apparatus for automatically optically inspecting electrical circuits according to claim 28 and wherein the polychromatic images are color images.