Method and apparatus for transceiving data using a bimodal power data link transceiver device
First Claim
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1. A bimodal power data link transceiver device, the device comprising:
- a transceiver integrated circuit (IC), the transceiver IC comprising;
a transmitter, the transmitter having;
partial voltage controlled oscillator (VCO) designed to accept at least one input from frequency setting components external to the transceiver IC and in combination with the frequency setting components to produce a first clock signal at a first frequency set by the frequency setting components;
a first power amplifier, the first power amplifier coupled to the partial VCO; and
a receiver;
a second power amplifier coupled to the first power amplifier;
a transmit/receive switch coupled to the second power amplifier and the receiver;
a controller coupled to the transceiver IC;
a direct digital frequency synthesizer having an output coupled to an input of the transceiver IC;
a complete voltage controlled oscillator (VCO) coupled to the partial VCO, the complete VCO configured to produce a second clock signal at a second frequency and to couple the second clock signal to the partial VCO the complete VCO further configured to utilize the partial VCO as one of an emitter follower circuit, a buffer or a filter; and
a loop filter coupled to the complete VCO and the transceiver IC.
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Abstract
A bimodal power data link transceiver device (33) is provided. The device comprises a transceiver integrated circuit (IC) (14); wherein the IC comprises an oscillator (150), a frequency reference port, and a RF output port. A VCO (12) is coupled to the oscillator and a direct digital synthesizer (15) is coupled to the frequency reference port. The combination allows the IC to operate below 200 MHz. In addition, an external power amplifier (19) is connected to the RF output port thus allowing for burst RF communications at a higher power than the quiescent receive mode.
16 Citations
26 Claims
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1. A bimodal power data link transceiver device, the device comprising:
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a transceiver integrated circuit (IC), the transceiver IC comprising; a transmitter, the transmitter having; partial voltage controlled oscillator (VCO) designed to accept at least one input from frequency setting components external to the transceiver IC and in combination with the frequency setting components to produce a first clock signal at a first frequency set by the frequency setting components; a first power amplifier, the first power amplifier coupled to the partial VCO; and a receiver; a second power amplifier coupled to the first power amplifier; a transmit/receive switch coupled to the second power amplifier and the receiver; a controller coupled to the transceiver IC; a direct digital frequency synthesizer having an output coupled to an input of the transceiver IC; a complete voltage controlled oscillator (VCO) coupled to the partial VCO, the complete VCO configured to produce a second clock signal at a second frequency and to couple the second clock signal to the partial VCO the complete VCO further configured to utilize the partial VCO as one of an emitter follower circuit, a buffer or a filter; and a loop filter coupled to the complete VCO and the transceiver IC. - View Dependent Claims (2, 3, 4, 5, 22)
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6. A method for transceiving data in a device adapted to transceive data in the radio frequency spectrum, the method comprising:
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providing a transceiver integrated circuit (IC), the transceiver IC having; a partial voltage controlled oscillator (VCO) designed to accept at least one input from frequency setting components external to the transceiver IC and in combination with the frequency setting components to produce a first clock signal at a first frequency set by the frequency setting components; an oscillator input port coupled to the partial VCO; a frequency reference port; a radio frequency input port; a radio frequency output port; a phase detector output port; using a complete VCO, generating a VCO signal for input to the oscillator input port, the VCO signal comprising a second clock signal at a second frequency, the complete VCO configured to utilize the partial VCO as one of an emitter follower circuit, a buffer, or a filter; coupling a direct digital synthesizer (DDS) to the frequency reference port; coupling the radio frequency output port to a power amplifier; and coupling the radio frequency input port to a transmit/receive switch. - View Dependent Claims (7, 8, 9, 10, 11, 12, 13, 14, 15, 23)
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16. A bimodal power data link transceiver device, the device comprising:
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a receiver section; a transmitter section; a phased locked loop (PLL) frequency generator section, wherein the PLL frequency generator section comprises; a complete voltage controlled oscillator (VCO); an integrated circuit (IC), wherein the integrated circuit comprises; a buffer, wherein the buffer is coupled to the complete VCO, and wherein the buffer comprises; a partial VCO designed to accept at least one input from frequency setting components external to the transceiver IC and in combination with the frequency setting components to produce a first clock signal at a first frequency set by the frequency setting components, wherein the complete VCO is configured to produce a second clock signal at a second frequency and to couple the second clock signal to the partial VCO, the complete VCO further configured to utilize the partial VCO as the buffer, a digital direct synthesizer (DDS), wherein the DDS is coupled to the IC; and a controller section, the controller section coupled to the PLL frequency generator section and the receiver section. - View Dependent Claims (17, 18, 19, 20, 21, 24)
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25. A bimodal power data link transceiver device, the device comprising:
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a transceiver integrated circuit (IC) designed to operate at and above a first frequency, the transceiver IC comprising; a transmitter, the transmitter having; a partial voltage controlled oscillator (VCO) designed to accept at least one input from frequency setting components external to the transceiver IC and in combination with the frequency setting components to produce a first clock signal at the first frequency set by the frequency setting components; a first power amplifier, the first power amplifier coupled to the partial VCO; and a receiver coupled to the partial VCO, a second power amplifier coupled to the first power amplifier; a transmit/receive switch coupled to the second power amplifier and the receiver; a controller coupled to the transceiver IC; a direct digital frequency synthesizer coupled to the controller and having an output coupled to an input of the transceiver IC; a complete voltage controlled oscillator (VCO) coupled to the partial VCO, wherein the complete VCO is configured to operate the transceiver IC at a second frequency smaller than the first frequency, the complete VCO configured to produce a second clock signal at the second frequency, the complete VCO further configured to utilize the partial VCO as one of an emitter follower circuit, a buffer, or a filter; and a loop filter coupled to the complete VCO and the transceiver IC. - View Dependent Claims (26)
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Specification