Frequency doubler circuit with trimmable current control

• US 7,180,342 B1
• Filed: 10/11/2001
• Issued: 02/20/2007
• Est. Priority Date: 10/26/2000
• Status: Active Grant

• Current Assignee: Monterey Research, LLC (Vector Capital Corporation)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Shutt, James, Kutz, Harold
• Primary Examiner(s): MIS, DAVID C
• Application Number:
  US09/977,111
• Time in Patent Office: 1,958 Days
• Field of Search: 327113-114, 327/116, 327/119, 327/122, 327/123
• US Class Current: 327/122
• CPC Class Codes: H03B 19/14 by means of a semiconductor device

Abstract

A frequency doubler circuit with trimmable current control. In one embodiment, the present invention provides a circuit comprising an oscillator with a current source and a frequency doubler circuit coupled to the current source. In one embodiment, the current source is for generating a reference current. In one embodiment, the frequency doubler circuit is operable to receive a first frequency signal for generating a second frequency signal and also receiving the reference current. The frequency doubler circuit, using the reference current, operates to compensate for process variation of capacitance of the frequency doubler circuit and uses the reference current to maintain a known duty cycle. In one embodiment, the circuit further comprises a control loop for generating an output current, wherein the output current, operating in conjunction with the reference current, operates to compensate for process variation of capacitance of the frequency doubler circuit and uses the reference current to maintain a known duty cycle. In one embodiment, the current source comprises a trimmable current control.

Claims

1. A circuit comprising:

a current source for generating a reference current; and

a frequency doubler circuit coupled to said current source and receiving a first frequency signal and also receiving said reference current, said frequency doubler circuit generating a second frequency signal and using said reference current to compensate for process variation of capacitance and using said reference current to maintain a known duty cycle.

2. A circuit as recited in claim 1 wherein the value of said second frequency signal is substantially twice the value of said first frequency signal.

3. A circuit as recited in claim 1 further comprising a control loop circuit for generating an output current, said output current operating in conjunction with said reference current to compensate for process variation of capacitance and using said reference current to maintain a known duty cycle.

4. A circuit as recited in claim 1 wherein said current source comprises trimmable current control.

5. A circuit as recited in claim 4 wherein said trimmable current control comprises a plurality of trimmable components.

6. A circuit as recited in claim 1 wherein said current source is a digital to analog converter circuit.

7. A circuit as recited in claim 6 wherein said digital to analog converter circuit comprises a trimmable current control.

8. A circuit as recited in claim 7 wherein said trimmable current control comprises a plurality of trimmable components.

9. A circuit as recited in claim 6 wherein said digital to analog converter circuit is for generating an oscillator current used in an oscillator circuit, said oscillator circuit for generating said first frequency signal.

10. A circuit as recited in claim 9 wherein the value of said oscillator current is equal in value to the value of said reference current.

11. A circuit as recited in claim 5 wherein said plurality of trimmable components are digitally controlled.

12. A circuit as recited in claim 8 wherein said plurality of trimmable components are digitally controlled.

13. A circuit comprising:

an oscillator circuit for generating a first frequency signal;

a current source for generating a reference current; and

a frequency doubler circuit coupled to said current source and receiving a first frequency signal and also receiving said reference current, said frequency doubler circuit generating a second frequency signal and using said reference current to compensate for process variation of capacitance and using said reference current to maintain a known duty cycle.

14. A circuit as recited in claim 13 wherein the value of said second frequency signal is substantially twice the value of said first frequency signal.

15. A circuit as recited in claim 13 further comprising a control loop circuit for generating an output current, said output current operating in conjunction with said reference current to compensate for process variation of capacitance and using said reference current to maintain a known duty cycle.

16. A circuit as recited in claim 13 wherein said current source comprises trimmable current control.

17. A circuit as recited in claim 16 wherein said trimmable current control comprises a plurality of trimmable components.

18. A circuit as recited in claim 13 wherein said current source is a digital to analog converter circuit.

19. A circuit as recited in claim 18 wherein said digital to analog converter circuit comprises a trimmable current control.

20. A circuit as recited in claim 19 wherein said trimmable current control comprises a plurality of trimmable components.

21. A circuit as recited in claim 18 wherein said digital to analog converter circuit is for generating an oscillator current used in said oscillator circuit for generating said first frequency signal.

22. A circuit as recited in claim 21 wherein the value of said oscillator current is equal in value to the value of said reference current.

23. A circuit as recited in claim 17 wherein said plurality of trimmable components are digitally controlled.

24. A circuit as recited in claim 20 wherein said plurality of trimmable components are digitally controlled.

25. A microcontroller comprising:

a bus;

a processor coupled to said bus;

a memory unit coupled to said bus;

an oscillator circuit for generating a first frequency signal;

a current source for generating a reference current; and

a frequency doubler circuit coupled to said current source and receiving a first frequency signal and also receiving said reference current, said frequency doubler circuit generating a second frequency signal and using said reference current to compensate for process variation of capacitance and using said reference current to maintain a known duty cycle.

26. A microcontroller as recited in claim 25 wherein the value of said second frequency signal is substantially twice the value of said first frequency signal.

27. A microcontroller as recited in claim 25 further comprising a control loop circuit for generating an output current, said output current operating in conjunction with said reference current to compensate for process variation of capacitance and using said reference current to maintain a known duty cycle.

28. A microcontroller as recited in claim 25 wherein said current source comprises trimmable current control.

29. A microcontroller as recited in claim 27 wherein said trimmable current control comprises a plurality of trimmable components.

30. A microcontroller as recited in claim 25 wherein said current source is a digital to analog converter circuit.

31. A microcontroller as recited in claim 30 wherein said digital to analog converter circuit comprises a trimmable current control.

32. A microcontroller as recited in claim 31 wherein said trimmable current control comprises a plurality of trimmable components.

33. A microcontroller as recited in claim 30 wherein said digital to analog converter circuit is for generating an oscillator current used in said oscillator circuit for generating said first frequency signal.

34. A microcontroller as recited in claim 33 wherein the value of said oscillator current is equal in value to the value of said reference current.

35. A microcontroller as recited in claim 29 wherein said plurality of trimmable components are digitally controlled.

36. A microcontroller as recited in claim 32 wherein said plurality of trimmable components are digitally controlled.