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Interface receive circuits for modularized data optimization engines and methods therefor

  • US 7,180,909 B1
  • Filed: 12/17/2001
  • Issued: 02/20/2007
  • Est. Priority Date: 12/17/2001
  • Status: Active Grant
First Claim
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1. A data optimization engine for deoptimizing selected frames of a first stream of data, comprising:

  • a receive interface circuit coupled to an optimization processor, said receive interface circuit being configured for receiving said first stream of data, said receive interface circuit includesa traffic controller circuit for separating frames in said first stream of data into a first deoptimizable frame and a first non-deoptimizable frame, anda deoptimization front-end circuit coupled to said traffic controller circuit to receive at least a first portion of said first deoptimizable frame, said deoptimization front-end circuit including a protocol conversion circuit configured to convert data in said first portion of said first deoptimizable frame from a first protocol to a second protocol suitable for processing by said optimization processor, said first protocol specifies a first word length, said second protocol specifies a second word length different from said first word length,wherein said optimization processor is configured to deoptimize said first portion of said first deoptimizable frame by performing at least one of decompression and decryption on said first portion of said first deoptimizable frame.

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