Interface receive circuits for modularized data optimization engines and methods therefor
First Claim
1. A data optimization engine for deoptimizing selected frames of a first stream of data, comprising:
- a receive interface circuit coupled to an optimization processor, said receive interface circuit being configured for receiving said first stream of data, said receive interface circuit includesa traffic controller circuit for separating frames in said first stream of data into a first deoptimizable frame and a first non-deoptimizable frame, anda deoptimization front-end circuit coupled to said traffic controller circuit to receive at least a first portion of said first deoptimizable frame, said deoptimization front-end circuit including a protocol conversion circuit configured to convert data in said first portion of said first deoptimizable frame from a first protocol to a second protocol suitable for processing by said optimization processor, said first protocol specifies a first word length, said second protocol specifies a second word length different from said first word length,wherein said optimization processor is configured to deoptimize said first portion of said first deoptimizable frame by performing at least one of decompression and decryption on said first portion of said first deoptimizable frame.
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Abstract
A data optimization engine for deoptimizing selected frames of a first stream of data, comprising a receive interface circuit coupled to an optimization processor. The receive interface circuit is configured for receiving the first stream of data. The receive interface circuit includes a traffic controller circuit for separating frames in the first stream of data into a first deoptimizable frame and a first non-deoptimizable frame, and a deoptimization front-end circuit coupled to the traffic controller circuit to receive at least a first portion of the first deoptimizable frame. The deoptimization front-end circuit includes a protocol conversion circuit configured to convert data in the first portion of the first deoptimizable frame from a first protocol to a second protocol suitable for processing by the optimization processor, the first protocol specifies a first word length, the second protocol specifies a second word length different from the first word length, wherein the optimization processor is configured to deoptimize the first portion of the first deoptimizable frame by performing at least one of decompression and decryption on the first portion of the first deoptimizable frame.
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Citations
6 Claims
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1. A data optimization engine for deoptimizing selected frames of a first stream of data, comprising:
a receive interface circuit coupled to an optimization processor, said receive interface circuit being configured for receiving said first stream of data, said receive interface circuit includes a traffic controller circuit for separating frames in said first stream of data into a first deoptimizable frame and a first non-deoptimizable frame, and a deoptimization front-end circuit coupled to said traffic controller circuit to receive at least a first portion of said first deoptimizable frame, said deoptimization front-end circuit including a protocol conversion circuit configured to convert data in said first portion of said first deoptimizable frame from a first protocol to a second protocol suitable for processing by said optimization processor, said first protocol specifies a first word length, said second protocol specifies a second word length different from said first word length, wherein said optimization processor is configured to deoptimize said first portion of said first deoptimizable frame by performing at least one of decompression and decryption on said first portion of said first deoptimizable frame. - View Dependent Claims (2, 3, 4, 5, 6)
Specification