Flip-chip system and method of making same

• US 7,183,139 B2
• Filed: 03/04/2004
• Issued: 02/27/2007
• Est. Priority Date: 10/24/2002
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Jayaraman, Saikumar, Wakharkar, Vijay S.
• Primary Examiner(s): Picardat; Kevin M.
• Application Number:
  US10/794,467
• Publication Number:
  US 20040185603A1
• Time in Patent Office: 1,090 Days
• Field of Search: 438/107, 438/108, 438/118, 438/119, 438/124, 438/125, 438/126, 438/127
• US Class Current: 438/118
• CPC Class Codes: C08G 59/3254 containing atoms other than carbon, hydrogen, oxygen or nitrogen
• CPC Class Codes: H01L 21/563 Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/13111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/29111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73203 Bump and layer connectors
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/83102 using surface energy, e.g. capillary forces
• CPC Class Codes: H01L 2224/83192 wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/92125 the second connecting process involving a layer connector
• CPC Class Codes: H01L 23/293 Organic, e.g. plastic
• CPC Class Codes: H01L 24/29 of an individual layer connector
• CPC Class Codes: H01L 24/743 Apparatus for manufacturing layer connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01032 : Germanium [Ge]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01039 : Yttrium [Y]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01057 : Lanthanum [La]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/0132 : Binary Alloys
• CPC Class Codes: H01L 2924/0133 : Ternary Alloys
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/3512 : Cracking

Abstract

A system for underfilling in a chip package includes an underfill mixture that ameliorates the CTE mismatch that typically exists between a packaged die and a resin-impregnated fiberglass mounting substrate. In one embodiment, the system includes an underfill mixture that alone exhibits a CTE that is characteristic of an inorganic-filled underfill composite previously known. An embodiment is also directed to the assembly of a flip-chip package that uses an underfill mixture.

Claims

1. A process comprising:

forming an underfill mixture between a flip-chip and a mounting substrate, wherein the underfill mixture includes a principal underfill composition selected from silesquioxanes, oligomerized or polymerized liquid crystal monomers, and mixtures thereof.

2. The process according to claim 1, wherein forming the underfill mixture between the flip-chip and the mounting substrate is done by a process selected from no-flow, capillary flow, and capillary-assisted flow.

3. The process according to claim 1, further including:

curing the mixture by a process selected from autocatalytic curing, additive catalytic curing, cross-linking, thermoset, and combinations thereof.

4. The process according to claim 1, wherein the flip-chip and the mounting substrate are coupled with a solder bump, the process further including:

curing the mixture by a process selected from autocatalytic curing, additive catalytic curing, cross-linking, thermoset, and combinations thereof and

reflowing the solder bump.

5. The process according to claim 1, wherein the flip-chip and the mounting substrate are coupled with a solder bump, the process further including:

reflowing the solder bump, wherein the solder bump includes a Pb-free solder.

6. The process according to claim 1, before forming, the process further including:

preparing a silesquioxane mixture by mixing the silesquioxane with Bis F epoxy monomer and an anhydride at a mole ratio of about 1;

1 between the epoxy and anhydride, and blending with a carboxy-terminated polybutadiene-acrylonitrile (CTBN) elastomer, about 5–

10 wt % of the mixture, and with a catalyst, about 1 wt % of the mixture.

7. The process according to claim 1, before forming, the process further including:

preparing a silesquioxane mixture by mixing the silesquioxane with Bis F epoxy monomer and an amine hardener at a mole ratio of about 0.5;

1.5 between the epoxy and amine, and blending with CTBN elastomer, about 5–

10 wt % of the mixture, and with a catalyst, about 1 wt % of the mixture.

8. The process according to claim 1, before forming, the process further including:

preparing a silesquioxane mixture by mixing the silesquioxane with Bis F epoxy monomer and an anhydride at a mole ratio of about 1;

1 between the epoxy and anhydride, blending with CTBN elastomer, about 5–

10 wt % of the mixture, with a catalyst, about 1 wt % of the mixture, with a reactive diluent, less than or equal to about 10% of the mixture, with an adhesion promoter, less than or equal to about 5% of the mixture, and with a flow modifier, less than or equal to about 5% of the mixture.

9. The process according to claim 1, before forming, the process further including:

preparing a silesquioxane mixture by mixing the silesquioxane with Bis F epoxy monomer and an anhydride at a mole ratio of about 1;

1 between the epoxy and anhydride, blending with CTBN elastomer, about 5–

10 wt % of the mixture, and with a catalyst, about 1 wt % of the mixture, and an inorganic particulate, about 10–

70 wt % of the mixture.

10. The process of claim 1, before forming, the process further including:

preparing a liquid crystal thermoset (LCT) monomer mixture by mixing the LCT with Bi-phenyl epoxy monomer and functionalizing thereby, by blending with CTBN elastomer and an anhydride hardener, at a mole ratio 1;

1 for epoxy to anhydride, and a catalyst at about 1–

2 wt % of the mixture; and

wherein forming includes

flowing the mixture by capillary action to fill interstitially between the flip-chip and the mounting substrate.

11. The process of claim 1, before forming, the process further including:

preparing an LCT monomer mixture by mixing the LCT with Bi-phenyl epoxy monomer and functionalizing thereby, by blending with CTBN elastomer and an amine hardener, at a mole ratio 0.5;

1.5 for epoxy to amine, and a catalyst at about 1–

2 wt % of the mixture; and

wherein forming includes

flowing the mixture by capillary action to fill interstitially between the flip-chip and the mounting substrate.

12. The process of claim 1, before forming, the process further including:

preparing an LCT monomer mixture by mixing the LCT monomer with Bi-phenyl epoxy monomer and functionalizing thereby, by blending with a CTBN elastomer and an anhydride hardener, at a mole ratio 1;

1 for epoxy to anhydride, a catalyst at about 1–

2 wt % of the mixture;

a reactive diluent, less than or equal to about 5% of the mixture, and an adhesion promoter, less than or equal to about 5% of the mixture, and wherein forming includes

flowing the mixture by capillary action to fill interstitially between the flip-chip and the mounting substrate.

13. The process of claim 1, before forming, the process further including:

preparing an LCT monomer mixture by mixing the LCT monomer with Bi-phenyl epoxy monomer and functionalizing thereby, by blending with a CTBN elastomer and an anhydride hardener, at a mole ratio 1;

1 for epoxy to anhydride, a catalyst at about 1–

2 wt % of the mixture;

a reactive diluent, less than or equal to about 5% of the mixture, an adhesion promoter, less than or equal to about 5% of the mixture, and a particulate, about 10% to about 60% of the mixture, and wherein forming includes

flowing the mixture by capillary action to fill interstitially between the flip-chip and the mounting substrate.

14. A process comprising:

bringing a flip-chip and a mounting substrate together; and

forming an underfill mixture between the flip-chip and the mounting substrate, wherein the underfill mixture includes a principal underfill composition selected from silesquioxanes, oligomerized or polymerized liquid crystal monomers, and mixtures thereof.

15. The process of claim 14, wherein forming the underfill mixture between the flip-chip and the mounting substrate is done by a process selected from no-flow, capillary flow, and capillary-assisted flow.

16. The process of claim 14, further including:

curing the mixture by a process selected from autocatalytic curing, additive catalytic curing, cross-linking, thermoset, and combinations thereof.

17. The process of claim 14, wherein an electrical bump is disposed between the flip-chip and the mounting substrate, the process further including:

curing the mixture; and

reflowing the electrical bump.

18. A process comprising:

bringing a flip-chip and a mounting substrate together;

preparing an underfill mixture, wherein the underfill mixture includes a principal underfill composition selected from silesquioxanes, oligomerized or polymerized liquid crystal monomers, and mixtures thereof; and

disposing the underfill mixture between the flip-chip and the mounting substrate.

19. The process of claim 18, wherein disposing the underfill mixture precedes bringing the flip-chip and the mounting substrate together.

20. The process of claim 18, further including:

curing the mixture by a process selected from autocatalytic curing, additive catalytic curing, cross-linking, thermoset, and combinations thereof.

21. The process of claim 18, wherein an electrical bump is disposed between the flip-chip and the mounting substrate, the process farther including:

curing the mixture; and

reflowing the electrical bump.

22. The process of claim 18, wherein an electrical bump is disposed between the flip-chip and the mounting substrate, the process farther including:

curing the mixture; and

reflowing the electrical bump, wherein curing and reflowing are carried out substantially simultaneously.