High-density plasma (HDP) chemical vapor deposition (CVD) methods and methods of fabricating semiconductor devices employing the same

• US 7,183,214 B2
• Filed: 09/22/2005
• Issued: 02/27/2007
• Est. Priority Date: 03/29/2005
• Status: Expired due to Fees

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Jeon, Jin-Ho, Nam, Jeong-Hoon
• Primary Examiner(s): Sarkar; Asok K.
• Assistant Examiner(s): Yevsikov; Victor V.
• Application Number:
  US11/233,538
• Publication Number:
  US 20060223321A1
• Time in Patent Office: 523 Days
• Field of Search: 438/694, 438/695, 438/728
• US Class Current: 438/694
• CPC Class Codes: C23C 16/045 Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
• CPC Class Codes: C23C 16/402 Silicon dioxide
• CPC Class Codes: C23C 16/505 using radio frequency discharges
• CPC Class Codes: H01L 21/02131 the material being halogen doped silicon oxides, e.g. FSG
• CPC Class Codes: H01L 21/02211 the compound being a silane, e.g. disilane, methylsilane or chlorosilane
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/02304 formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
• CPC Class Codes: H01L 21/02362 formation of intermediate layers, e.g. capping layers or diffusion barriers
• CPC Class Codes: H01L 21/31608 Deposition of SiO2 H01L21/31625, H01L21/31629 and H01L21/31633 take precedence
• CPC Class Codes: H01L 21/31625 Deposition of boron or phosphorus doped silicon oxide, e.g. BSG, PSG, BPSG
• CPC Class Codes: H01L 21/31629 Deposition of halogen doped silicon oxide, e.g. fluorine doped silicon oxide

Abstract

In one embodiment, a semiconductor substrate is placed into a process chamber. A gas mixture including a silicon-containing gas, a fluorine-containing gas, an inert gas, and an oxygen gas is introduced into the chamber at a pressure range of from about 30 mTorr to about 90 mTorr. During this time, deposition and etching processes are concurrently performed using a plasma to form a high-density plasma (HDP) insulating layer on the semiconductor substrate. A ratio of deposition to etching is from about 3:1 to about 10:1. A ratio of a flow rate of the fluorine-containing gas to a flow rate of the silicon-containing gas is less than about 0.9.

Claims

1. A method of manufacturing a semiconductor device, the method comprising:

placing a semiconductor substrate with a trench in a chamber;

forming a first insulating layer on a bottom of the trench;

concurrently performing deposition and etching processes to form a gap-fill dielectric layer over the first insulating layer by introducing a gas mixture comprising a silicon-containing gas, a fluorine-containing gas, an inert gas, an oxygen gas, and also a hydrogen gas into the chamber under a high-density plasma condition at a pressure range of from about 30 mTorr to about 90 mTorr,

wherein a ratio of a flow rate of the fluorine-containing gas to a flow rate of the silicon-containing gas is less than about 0.9.

2. The method of claim 1, which further comprises forming a second insulating layer over the dielectric layer.

3. The method of claim 1, wherein the first insulating layer comprises an oxide layer formed without using the fluorine-containing gas.

4. A method of manufacturing a semiconductor device, the method comprising:

forming a trench in a semiconductor substrate;

forming a first insulating layer on a bottom of the trench; and

concurrently performing deposition and etching processes to form a gap-fill dielectric layer over the first insulating layer by using a plasma and a gas mixture comprising a silicon-containing gas, a fluorine-containing gas, an inert gas, an oxygen gas, and also a hydrogen gas at a pressure range of from about 30 mTorr to about 90 mTorr,

wherein a ratio of a flow rate of the fluorine-containing gas to a flow rate of the silicon-containing gas is about 0.5 to about 0.9 and a ratio of a flow rate of the hydrogen gas to a flow rate of the fluorine-containing gas is at least about 5;

1 during the concurrent deposition and etching processes.

5. The method of claim 4, which further comprises forming a second insulating layer over the dielectric layer.

6. The method of claim 4, wherein a thickness of the gap-fill dielectric layer is greater than about 1500 angstroms and less than about 4000 angstroms, wherein a thickness of the second insulating layer is greater than about 1000 angstroms and less than about 4000 angstroms, and wherein a thickness of the first insulating layer is no greater than about 500 angstroms.

7. The method of claim 4, wherein the silicon-containing gas comprises SiH₄, and wherein a flow rate of the SiH₄ is greater than about 65 sccm.

8. The method of claim 4, wherein the fluorine-containing gas includes a gas chosen from NF₃, CF₄, F₂, C₂F₆, CH₂F₂, and SiH₂F₂.

9. The method of claim 4, wherein the silicon-containing gas includes a gas chosen from SiH₄ and Si₂H₆.

10. The method of claim 4, wherein the pressure ranges from about 60 mTorr to about 90 mTorr.